ASIC Engineer, Architecture

Job Title

ASIC Engineer, Architecture

Role Summary

Join Meta's Silicon Engineering organization to lead architectural performance analysis, pre-silicon modeling, and microarchitectural exploration for custom infrastructure ASICs. The role partners with architecture, RTL, physical design, and software teams to ensure silicon meets throughput, latency, and efficiency targets for hyperscale AI and data center workloads.

This role focuses on building and owning performance modeling methodologies, simulation infrastructure, workload development, and cross-functional performance validation to inform silicon architecture and roadmap decisions.

Experience Level

Entry-level (2+ years of relevant ASIC design, silicon engineering, or related technical experience).

Responsibilities

Key responsibilities include modeling, analysis, and collaboration to drive silicon architecture choices and ensure performance targets are met.

• Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains.
• Define and own performance modeling strategy, including cycle-accurate and transaction-level simulation environments.
• Develop and maintain C++ models of chip IPs and subsystems for architecture exploration, performance analysis, and software development.
• Develop low-level workloads and kernels for ML training and inference to exercise silicon designs.
• Establish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques.
• Collaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specifications.
• Partner with software and systems teams to co-optimize scheduling, firmware, and drivers against silicon characteristics.
• Lead cross-functional technical reviews and present modeling results and architectural recommendations to engineering leadership.
• Define long-term performance modeling infrastructure roadmaps, tooling, automation, and simulation platform investments.
• Mentor engineers on performance modeling, simulation methodology, and microarchitectural analysis; perform model-to-hardware correlation and root-cause analysis for performance gaps.

Requirements

Must-have technical skills and experience.

• 2+ years of experience in ASIC design, silicon engineering, or a related technical field.
• Proficiency in C++ and Python for simulation models, automation, and performance tools.
• Experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs.
• Experience analyzing performance of data center, AI accelerator, or high-performance computing workloads on custom silicon.
• Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC (or equivalent) for processors, memory subsystems, or high-speed interconnects.
• Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams.
• Experience with assembly programming languages and familiarity with compiler technologies.

Nice-to-have / preferred:

• Experience building Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis.
• Experience writing or optimizing compute/collective kernels in CUDA or equivalent GPU frameworks.
• Familiarity with post-silicon performance validation and model-to-hardware correlation.
• Experience with AI numerics, precision/accuracy analysis, high-level synthesis, or power-performance-area trade-offs.
• Experience building performance modeling infrastructure for hyperscale ASICs (network, storage, or inference accelerators).
• Familiarity with hardware description languages (SystemVerilog, VHDL) and ASIC simulation environments.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field is specified as required (or equivalent practical experience). Degree must be completed prior to joining Meta; equivalent practical experience is accepted.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.