ASIC Engineer

Job Title

ASIC Engineer

Role Summary

Design, verify and deploy ASIC and FPGA hardware for the Ultra Low Latency team. Collaborate with trading, networking and research infrastructure teams and contribute across projects from RTL through physical design and verification.

Experience Level

Mid-level — 4+ years practical experience in RTL design and verification.

Responsibilities

Key responsibilities include:

• Design and verify RTL for ASICs and FPGAs.
• Participate in front-end RTL development and synthesis.
• Support back-end physical design and floorplanning as required.
• Develop and execute verification plans, including formal methods.
• Integrate hardware with system components used by trading and networking teams.
• Apply software engineering practices to improve hardware workflows and tooling.
• Collaborate with cross-functional teams to deliver production hardware.

Requirements

Must-have skills and experience:

• 4+ years practical experience in RTL design and verification.
• Experience with ASIC design flows (Synopsys or Cadence) and one or more areas: front-end RTL design and synthesis, back-end physical design, or verification (including formal).
• Proficiency in a high-level programming language (Python, C++, Java, Haskell, etc.).
• Fluent in English.
• Willingness to adopt new tools and workflows.

Nice-to-have:

• Experience with FPGA development and toolchains.
• Familiarity with OCaml or interest in learning Hardcaml.

Education Requirements

Not specified.

About the Company

Company: Jane Street

Headquarters: London, United Kingdom

Jane Street is a global trading firm and liquidity provider that specializes in technology-driven strategies. Established in 2000, the company focuses on providing liquidity and improving market efficiency through advanced analytics and trading technologies.