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ASIC Digital Design & Verification Manager

Synopsys
June 28, 2026
Full-time
On-site
Hsinchu, Taiwan
Verification Jobs, Level - Senior

Job Title

ASIC Digital Design & Verification Manager

Role Summary

Lead a team responsible for the architecture, design, and verification of synthesizable DesignWare IP cores, with a focus on high-performance memory controller IPs (HBM/DDR/LPDDR).

Work closely with RTL designers, architects, and verification engineers in a global, multi-site organization to deliver production-quality IP and meet release milestones.

Experience Level

Senior — 10–15 years of relevant experience in IP or SoC design and verification; prior experience managing engineering teams.

Responsibilities

Accountable for technical leadership and delivery of IP design and verification efforts.

  • Specify, architect, and implement IP design and verification environments for synthesizable cores.
  • Lead and mentor a team of 5–10 design and verification engineers, assign tasks, and drive day-to-day closure of activities.
  • Collaborate with RTL designers, architects, and verification engineers across global teams.
  • Develop RTL code, unit and system-level test plans, and UVM testbenches; perform regression and debug triage.
  • Ensure product release milestones and quality targets are met.
  • Contribute to development and improvement of next-generation DesignWare HBM IPs and verification methodologies.

Requirements

Must-have technical skills, leadership experience, and tooling knowledge.

  • 10–15 years of relevant experience in IP core and/or SoC verification and design leadership.
  • Proven experience leading engineering teams and delivering project milestones.
  • Hands-on RTL design and/or verification experience at IP or SoC level.
  • Strong Verilog/SystemVerilog skills and experience developing UVM testbenches.
  • Familiarity with memory protocols such as HBM, DDR, and LPDDR.
  • Experience with IP design and verification tools and methodologies.
  • Proficiency in scripting/automation using Perl and Python.
  • Strong communication, problem-solving, and cross-site collaboration skills.

Education Requirements

BS or MS in Electrical Engineering, Electronic Engineering, VLSI, or a closely related technical field. The posting specifies 10–15 years of relevant experience in lieu of additional degree detail.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-06-24