ASIC Digital Design, Staff
SynopsysJob Title
ASIC Digital Design, Staff
Role Summary
As a Staff ASIC Digital Design Engineer you are the technical owner for a PCIe controller subsystem end-to-end: translate architecture into micro-architecture and production RTL, drive verification and synthesis to release, and support integration and post-silicon/customer debug.
Experience Level
Senior-level (Staff). Typically 6–8+ years of relevant ASIC/RTL design experience.
Responsibilities
The role focuses on ownership of RTL and micro-architecture for PCIe subsystems and driving those areas to production-quality IP or tapeout.
- Own RTL and micro-architecture for one or more PCIe controller subsystems or major features, including block-to-subsystem integration.
- Write design specifications and implement production-quality, parameterized RTL.
- Drive verification, synthesis, timing-closure support, and design convergence.
- Resolve complex design and debug issues; evaluate and escalate architecture trade-offs with clear options.
- Lead and participate in design reviews; enforce coding standards and CDC/RDC practices.
- Collaborate with verification, formal, emulation, and physical design to close bugs and integration issues.
- Support post-silicon and customer debug for your owned area.
- Mentor senior and junior engineers; communicate status, risks, and dependencies.
Requirements
Must-have technical skills and relevant experience; listed items indicate core expectations and notable pluses.
- Proven ownership of complex ASIC RTL (subsystem or large block) from specification through tapeout or IP release.
- Strong experience in PCIe digital design, or equivalent high-speed protocol design (CXL, AMBA, DDR controller, UCIe, Ethernet MAC).
- ASIC fundamentals: synthesizable RTL, clocking, CDC/RDC, resets, low-power techniques, and DFT awareness.
- Ability to define micro-architecture from architecture specs and produce maintainable, parameterized RTL.
- Experience collaborating with verification, formal, and physical design teams to resolve issues.
- Experience with parameterized/configurable IP is a strong plus.
- Scripting (Python, TCL, Perl) desirable; familiarity with AI-assisted design tools is a plus.
Education Requirements
Bachelor of Science in Electrical Engineering (BSEE) with 8+ years of relevant experience, or Master of Science in Electrical Engineering (MSEE) with 6+ years of relevant experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
