ASIC Digital Design Sr. Staff Engineer
Lead digital design work for Synopsys LPDDR PHY IP, owning architecture, RTL implementation, verification handoffs and productization across the IP development lifecycle.
Work with cross-functional teams (Verification, Timing, DFT, Power) and provide technical leadership and customer support for integration into SoCs.
Senior β requires a minimum of 8 years of relevant experience.
Key responsibilities include:
Must-have technical skills and attributes:
Nice-to-have:
BS in Electrical Engineering required. The posting specifies a minimum of 8 years of experience; no alternative degree-equivalent language or certifications were provided.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
