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ASIC Digital Design Sr Staff Engineer

Synopsys
November 2, 2026
Full-time
On-site
Markham, Ontario, Canada
Verification Jobs, Level - Senior

Job Title

ASIC Digital Design Sr Staff Engineer

Role Summary

Senior verification engineer on a mixed-signal IP team responsible for digital verification of high-speed SerDes and related IP (Backplane Ethernet, PCIe, SATA, USB).

Work includes creating verification plans, developing modular SystemVerilog/UVM testbenches, running and debugging RTL and gate-level regressions, and collaborating with digital and analog designers to deliver production-quality silicon.

Experience Level

Senior - requires substantial industry experience. The role references 8+ years of relevant digital verification experience.

Responsibilities

Primary responsibilities include verification planning, testbench development, regression management, and cross-discipline collaboration.

  • Create and maintain verification test plans and test cases.
  • Develop modular constrained-random and coverage-driven testbenches in Verilog/SystemVerilog and UVM/VMM.
  • Write SystemVerilog assertions and functional coverage.
  • Run, monitor, and debug RTL and gate-level simulation regressions.
  • Perform functional and performance validation on test chips and production silicon.
  • Track and report issues in Jira and document results in Confluence.
  • Build and maintain reusable verification infrastructure to accelerate future projects.

Requirements

Must-have technical skills and experience; nice-to-have items noted separately.

Must-have:

  • 8+ years industry experience in digital verification methodology (UVM/VMM).
  • Hands-on experience writing testcases and testbenches in Verilog and SystemVerilog.
  • Proven ability to debug complex testbench and design issues, including RTL and gate-level failures.
  • Knowledge of high-speed digital and mixed-signal design and solid understanding of digital circuit design.
  • Basic C/C++ familiarity and scripting skills (Python or Perl).
  • Independent learner with strong organization and communication skills.

Nice-to-have:

  • SystemVerilog Assertions and formal verification experience.

Education Requirements

Bachelor's or Master's degree in Electronics, Electrical Engineering, or a related field is specified. The posting expects substantial industry experience (listed as 8+ years).


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-28