ASIC Digital Design Principal Engineer
Senior verification engineer responsible for designing and implementing verification environments and testbenches for high-performance interface IP and complex ASIC designs. Works with architecture and design teams to ensure functional correctness and coverage closure.
Senior β Principal-level engineer with extensive verification experience (senior/lead responsibilities, mentoring junior engineers).
Core responsibilities include verification planning, environment development, and cross-team defect resolution.
Must-have technical skills and practical experience; concise list of expectations.
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
