ASIC Digital Design Principal Engineer

Job Title

ASIC Digital Design Principal Engineer

Role Summary

Lead and execute verification activities for complex ASIC blocks and full-chip systems within a cross-functional ASIC Digital Design team. The role focuses on building and maintaining UVM-based verification environments, applying verification methodologies, and improving verification quality and coverage.

Work closely with design, physical, and applications engineering to ensure high-performance, power-efficient, and reliable ASIC delivery; mentor junior engineers and drive verification best practices.

Experience Level

Senior — requires substantial hands-on experience; the posting specifies 10+ years in ASIC/UVM verification.

Responsibilities

The role is responsible for end-to-end verification of ASIC blocks and systems and for improving verification processes and metrics.

• Lead verification of complex ASIC blocks and system-level flows to meet specifications and performance targets.
• Define verification requirements in collaboration with design teams.
• Develop and maintain UVM testbenches, agents, and verification infrastructure.
• Create, review, and improve test plans, test code, and coverage strategies.
• Apply SVA and formal techniques where appropriate; analyze results and close verification gaps.
• Implement and analyze functional coverage and related metrics.
• Use EDA tools and verification methodologies to optimize performance and power verification.
• Mentor junior engineers and provide technical leadership within the team.

Requirements

Core qualifications and skills required for the role; preferred items listed as nice-to-have.

• Must-have: 10+ years of ASIC verification experience with UVM-based environments.
• Must-have: Proficiency in SystemVerilog and experience with industry-standard EDA verification tools and methodologies.
• Must-have: Proficiency in scripting/programming: C, Python, and TCL/Perl.
• Must-have: Experience with verification planning, coverage closure, and debug of complex designs; strong analytical and problem-solving skills.
• Must-have: Experience with high-performance interface IP protocols and their implementation in ASICs.
• Must-have: Demonstrated leadership and mentoring experience; strong communication and collaboration skills.
• Nice-to-have: RTL design background.
• Nice-to-have: Experience with SVA, formal verification techniques, and modern verification automation (including use of AI tools for verification).

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.