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ASIC Digital Design Manager

Synopsys
November 2, 2026
Full-time
On-site
Markham, Ontario, Canada
Semiconductor IP Jobs, Level - Senior

Job Title

ASIC Digital Design Manager

Role Summary

Lead firmware and digital-design efforts for SerDes PHY IP (PAM4 for PCIe and Ethernet) on the Serdes AOIP team. Balance hands-on technical work-firmware development, RTL waveform analysis, and post-silicon bring-up-with team leadership and cross-functional coordination.

Collaborate with systems, analog, digital design, verification, and lab teams to deliver production-quality firmware, improve system-level architecture, and drive better development methodologies.

Experience Level

Senior - 10+ years of relevant industry experience.

Responsibilities

Primary responsibilities include firmware development and debugging, post-silicon bring-up, and technical leadership across cross-functional teams.

  • Develop and maintain firmware for PAM4 SerDes across protocols such as PCIe and Ethernet.
  • Analyze RTL waveforms to debug firmware and system interactions during bring-up.
  • Collaborate with systems, analog, digital design, verification, and lab teams during development and silicon bring-up.
  • Support and enhance existing firmware features and maintain firmware development infrastructure.
  • Diagnose customer firmware-related failures and provide technical solutions for customer deployments.
  • Define verification plans and assist DV engineers to build verification environments using SystemVerilog with UVM.
  • Drive improvements in firmware design methodologies and contribute to system-level architecture.
  • Lead and coordinate engineering activities to deliver integrated IP and firmware releases.

Requirements

Required technical skills and experience. Formal degree information is provided separately below.

  • 10+ years of experience in firmware, digital design, or related fields.
  • Deep expertise working at the boundary of hardware, software, and analog; experienced with post-silicon bring-up and hardware/algorithm optimization.
  • Proficient in C and an advocate for structured firmware development, verification, and documentation processes.
  • Experience with digital logic design, simulation, and debug using Verilog.
  • Familiarity with cross-development tool flows and integration/debug workflows.
  • Strong problem-solving skills and experience executing complex projects to completion.

Nice-to-have:

  • Familiarity with SerDes standards such as PCIe and Ethernet.
  • Scripting experience with Perl, Python, Bash, or Csh.

Education Requirements

Bachelor's, Master's, or PhD in Computer Engineering, Electrical Engineering, or a related technical field - or equivalent industry experience.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-29