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ASIC Digital Design Engineer

Synopsys
October 23, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Entry or Early Career

Job Title

ASIC Digital Design Engineer

Role Summary

Join a formal verification-focused team responsible for improving verification rigor for Synopsys IP and EDA tools. The role emphasizes applying formal methods to find functional corner-case bugs before tapeout and automating verification flows.

You will work with experienced formal verification engineers to validate RTL, write assertions, and build scripts and flows that increase verification coverage and efficiency.

Experience Level

Entry-level; 0–2 years of experience (internships, projects, and coursework count).

Responsibilities

Core responsibilities include implementing and automating formal verification tasks and contributing to verification quality.

  • Learn and apply formal verification methodology on live projects under the guidance of senior engineers.
  • Execute validation tasks according to defined plans and debug verification failures.
  • Write and refine SystemVerilog Assertions (SVA) to capture design intent and expose edge-case failures.
  • Develop scripts and automation (Python, Perl, or Tcl) to streamline verification flows in Unix/Linux environments.
  • Support quality improvements and provide insights to enhance verification tool capabilities and flows.
  • Collaborate with design and verification teams to accelerate closure on complex designs using formal methods.

Requirements

Must-have technical skills and relevant practical experience.

  • Strong understanding of computer architecture and digital design fundamentals (state machines, pipelining, timing).
  • Hands-on experience with hardware description languages; Verilog or SystemVerilog preferred.
  • Proficiency in at least one scripting language (Python, Perl, or Tcl) and comfort working in Unix/Linux.
  • Experience debugging RTL and reasoning about corner cases and failure modes.
  • Familiarity with formal verification tools, assertion languages, or model checking is a strong plus.
  • Clear written and verbal communication and attention to detail when reporting bugs and verification gaps.

Education Requirements

Bachelor's or Master's degree in Electronics, Electrical, Instrumentation, or a related engineering discipline. Internships, projects, and coursework count toward experience; practical equivalent experience is accepted.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-20