ASIC Design Verification Technical Leader

Job Title

ASIC Design Verification Technical Leader

Role Summary

Lead verification strategy and execution for silicon photonics driver ICs and integrated transceiver designs in Cisco’s Client Optics Group. Work across sites with architecture, design, and system teams to define verification methodology, drive block- and chip-level verification, and support post-silicon bring-up.

Experience Level

Senior — typically 8+ years of ASIC design verification experience (senior technical lead responsibilities and team/project leadership).

Responsibilities

Principal responsibilities include defining verification approach, leading verification activities, and resolving complex silicon issues.

• Define and drive verification methodology and standards across multiple projects and sites.
• Lead block- and chip-level verification for large SoCs/subsystems integrating high-speed IP.
• Review specifications and participate in design reviews to improve testability and verification efficiency.
• Develop and maintain scalable, reusable, coverage-driven verification environments.
• Mentor and coach verification engineers; improve team skill set and execution.
• Debug complex silicon and system-level issues during bring-up and post-silicon phases.
• Coordinate with architecture, design, and validation teams to optimize integration and performance.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Must-have: Strong hands-on experience with SystemVerilog and UVM.
• Proven track record delivering verification for large-scale SoCs or subsystems.
• Experience leading verification teams or projects and coordinating across multiple sites.
• Experience with high-speed IPs such as SerDes, D2D PHY, integrated drivers/TIA, ODSP, and related control functions.
• Proficiency in scripting and automation (Python, Perl, TCL, or shell scripting).
• Experience troubleshooting and debugging at RTL, emulation, and silicon bring-up stages.
• Nice-to-have: Formal verification experience and familiarity with HDLs (Verilog/SystemVerilog).
• Experience with emulation/prototyping platforms (e.g., Veloce, HAPS).
• Experience influencing design for testability (DFT) and collaborating on verification strategy with architects and designers.
• Familiarity with CPU subsystems and protocols (Ethernet, SPI/I2C, UCIE/UAL, etc.) is beneficial.

Education Requirements

Bachelor's in Electrical Engineering or Computer Engineering plus 8+ years of ASIC design verification experience; or Master’s in Electrical/Computer Engineering plus 6+ years; or PhD in Electrical/Computer Engineering plus 3+ years. Equivalent practical experience considered where stated.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).