ASIC Design Verification Technical Leader

Job Title

ASIC Design Verification Technical Leader

Role Summary

Lead verification efforts for Cisco's silicon photonics driver integrated circuits used in high-speed optical transceivers and co-packaged optics. Work across projects and sites to define verification methodology, drive block- and chip-level verification, and support post-silicon bring-up and system integration.

Join the Client Optics Group (COG) verification team to influence architecture for testability, mentor engineers, and improve verification efficiency for next-generation optical products.

Experience Level

Level: Senior. Typical experience expectations: 8+ years ASIC design verification with a Bachelor's degree; 6+ years with a Master’s; 3+ years with a PhD (as specified by employer).

Responsibilities

Primary responsibilities include defining verification strategy, executing verification plans, and leading teams through silicon bring-up and integration.

• Define and enforce verification methodology and standards across multiple projects and sites.
• Lead block- and chip-level verification for large SoCs/subsystems integrating high-speed IPs (SerDes XSR/PAM4, ODSP, D2D, integrated drivers/TIA, control functions).
• Review specifications, participate in design reviews, and influence architecture for testability and verification efficiency.
• Mentor and coach verification engineers; drive continuous improvement in technical skills and execution.
• Debug complex silicon and system-level issues during bring-up; support post-silicon validation and integration.
• Coordinate verification activities across teams, sites, and with architecture/design groups.

Requirements

Must-have technical skills and experience for day-one contribution; preferred items listed separately.

• Proven experience in SystemVerilog, UVM, and modern verification methodologies.
• Track record owning and delivering verification for large SoCs or subsystems.
• Experience leading verification teams or projects and coordinating cross-site efforts.
• Proficiency in scripting and automation (Python, Perl, TCL, Shell).
• Strong debugging and troubleshooting skills through bring-up phases.
• Nice-to-have: experience with SerDes IP, D2D PHY, ODSP and integrated transceiver features, CPU subsystems and common protocols (Ethernet, UCIE, UAL, SPI/I2C).
• Nice-to-have: familiarity with formal verification, emulation/prototyping platforms (e.g., Veloce, HAPS), and design-for-testability practices.

Education Requirements

Bachelor's degree in Electrical Engineering or Computer Engineering plus 8+ years ASIC design verification experience; OR Master's in EE/CE plus 6+ years; OR PhD in EE/CE plus 3+ years. (Qualifications specified by employer.)

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).