ASIC Design Verification Engineer (Multiple Levels)
QualcommJob Title
ASIC Design Verification Engineer (Multiple Levels)
Role Summary
Work on pre-silicon and post-silicon verification of digital power IP and other ASIC blocks, from system-level concept through tape-out and silicon bring-up. The team develops test plans, verification environments, assertions, coverage, and automation to ensure design quality.
Located in Vancouver, BC; role focuses on advanced verification methodology and improving verification efficiency through automation and power-aware verification flows.
Experience Level
Multiple levels (mid-career focus). The posting includes early-career and senior expectations; baseline experience guidance in the posting ranges from approximately 1–6+ years depending on degree and level.
Responsibilities
Primary responsibilities include planning and executing verification activities and building reusable verification infrastructure.
- Define and execute pre-silicon test plans for digital power IP and related blocks.
- Design and implement block-level testbenches and verification environments (e.g., SystemVerilog, UVM).
- Develop code and infrastructure for functional coverage and assertion-based verification.
- Apply formal verification (property checking) and assertion modeling where appropriate.
- Implement power-aware verification flows using UPF and related methodologies.
- Create automation and scripting to improve verification efficiency and repeatability.
- Support integration, validation, and post-silicon debug activities as designs progress to tape-out and silicon.
Requirements
Must-have technical skills and experience; see Education Requirements for degree and years combinations.
- Experience with ASIC design and verification tools, techniques, and methodology.
- Hands-on experience with RTL verification languages and methodologies (SystemVerilog, UVM, or equivalent).
- Experience developing block-level testbench environments and functional coverage.
- Familiarity with assertion-based verification and formal property checking.
- Power-aware verification experience (UPF) or willingness to learn power verification flows.
- Scripting and automation skills (Perl, Python, or similar).
- Nice-to-have: knowledge of AMBA protocols (AXI/AHB/APB), C/C++ programming, computer architecture fundamentals, and extensive digital design/RTL experience for senior roles.
Education Requirements
Bachelor's degree in Science, Engineering, or related field (with ~2+ years ASIC design/verification experience), OR Master’s degree in Science/Engineering or related field (with ~1+ year experience), OR PhD in Science/Engineering. Preferred fields include Computer Science, Electrical Engineering, or Computer Engineering. (These degree and years combinations were specified in the posting.)
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
