ASIC Design Verification Engineer
QualcommJob Title
ASIC Design Verification Engineer
Role Summary
Join the ASIC verification team responsible for the end-to-end verification lifecycle of digital power IP and subsystems, from pre-silicon planning through tape-out and post-silicon support. The role focuses on developing test plans, advanced verification environments, coverage and assertion models, and verification automation.
Experience Level
Mid-level — typically 3+ years of ASIC design verification (UVM/assertion-based) experience; candidates with the listed minimum qualifications are expected to meet or exceed this experience level.
Responsibilities
Primary responsibilities include planning and executing verification for digital power IP and related subsystems.
- Develop pre-silicon test plans and verification strategies for digital power IP and SOC subsystems.
- Implement testbenches and verification environments using SystemVerilog and UVM.
- Create functional coverage, assertions, and property checks; support formal verification efforts.
- Apply power-aware verification methodologies, including UPF flows.
- Use and integrate memory verification VIPs for DDR and cache subsystems; support DDR PHY verification.
- Automate verification flows and regressions to improve efficiency and reliability.
- Support pre-silicon to post-silicon transitions and debug with cross-functional teams (RTL, firmware, validation).
- Participate in performance and power verification, including PASIM simulations where applicable.
Requirements
Must-have technical skills and experience for immediate contribution.
- Minimum 3 years of design verification experience using UVM and assertion-based methodologies.
- Experience verifying complex SoCs or SoC subsystems, including caches and DDR memory protocols.
- Practical experience with memory verification VIPs and DDR PHY exposure.
- Experience in multiple successful tapeouts and post-silicon debug.
- Familiarity with formal verification and property checking.
- Experience or exposure to PASIM simulations and performance/power verification.
- Proficiency in SystemVerilog/UVM, assertions, and scripting (Python); familiarity with C++ for firmware/driver interaction.
Nice-to-have:
- Direct experience with power-aware UPF verification flows and additional automation tools.
- Deeper firmware development experience or driver integration for verification tasks.
Education Requirements
Bachelor's degree in Science, Engineering, or a related field with 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or a related field with 1+ year of relevant experience; OR PhD in a related field.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
