ASIC Design Verification Engineer
The ASIC Design Verification Engineer will join Qualcomm's ASICs Engineering group to drive verification of digital power IPs across the full lifecycle from system concept through pre-silicon validation, tape-out and post-silicon support.
The role focuses on developing UVM/SystemVerilog testbenches, coverage and assertion models, applying formal techniques, and using power-aware verification (UPF) methods while improving verification automation and efficiency.
Mid-level β typically requires around 3+ years of hands-on design verification experience using UVM and assertion-based technologies.
Primary responsibilities include:
Must-have technical skills and experience:
Nice-to-have:
Bachelor's degree in Science, Engineering, or a related field with 2+ years of relevant experience; or a Master's degree with 1+ year of relevant experience; or a PhD in a related field. (Degrees and related technical fields were specified in the source.)
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
