ASIC Design Engineering Lead - SoC IP DMA

Job Title

ASIC Design Engineering Lead - SoC IP DMA

Role Summary

Lead a team responsible for the front-end SoC IP DMA design lifecycle, balancing people management and hands-on technical contributions. Drive micro-architecture, RTL delivery, verification strategy, debug, and design infrastructure to achieve silicon-ready quality.

Work closely with platform architecture, integration, and verification teams to plan and deliver high-performance, production-ready IP used in Apple's products.

Experience Level

Senior-level role. The posting specifies a minimum of 20 years of relevant industry experience and requires extensive technical leadership and hands-on ASIC experience.

Responsibilities

Key responsibilities include leading the team, making technical decisions, and delivering production-quality IP:

• Lead and mentor a multi-person engineering team; manage interpersonal dynamics and professional development.
• Define and document micro-architecture and review team deliverables for correctness and quality.
• Contribute hands-on to micro-architecture, RTL design, verification strategy, and debug activities.
• Drive development of design infrastructure, automation, and strategic use of AI and emerging tools.
• Scope features and produce bottoms-up effort, area, and power estimates; create schedules and resourcing plans.
• Partner with architecture, IP/chip integration, design verification, and formal verification teams to align milestones and deliverables.
• Track execution, surface and mitigate risks early, and communicate status to stakeholders.

Requirements

Must-have and preferred qualifications distilled from the posting.

• Must-have: Minimum 20 years of relevant industry experience; proven technical leadership accountable for multi-person deliverables and setting technical direction.
• Must-have: Hands-on experience across microarchitecture, RTL, verification strategy, and debug; strong project planning and execution skills (bottom-up scheduling, effort/area/power estimation).
• Must-have: Strong written and verbal communication skills and ability to collaborate cross-functionally.
• Must-have: Solid understanding of SoC architecture and high-performance design concerns (networking, AI/ML compute, image/video processing, memory subsystems).
• Nice-to-have: Extensive front-end ASIC design experience (posting indicates 10+ years desirable).
• Nice-to-have: Familiarity with AMBA protocols (AXI, APB), arbitration, flow control, caching, address translation, QoS, and timing optimization for high-frequency designs.
• Nice-to-have: Experience with low-power techniques (clock gating, power gating) and formal verification.
• Nice-to-have: Track record of building tools, automation, and strategic use of AI to improve design productivity.

Education Requirements

Requires a Bachelor's degree (BS) and a minimum of 20 years of relevant industry experience as stated in the posting. No specific field of study or equivalent-experience language is specified in the source.

About the Company

Company: Apple

Headquarters: Cupertino, California, United States

Apple is a multinational technology company that designs, manufactures, and sells consumer electronics, software, and online services. Known for its innovative products such as the iPhone, Mac computers, and iPad, Apple emphasizes a strong commitment to high-quality design and user experience.