ASIC Design Engineer, Senior to Staff

Job Title

ASIC Design Engineer, Senior to Staff

Role Summary

Design and deliver Ethernet switching ASIC subsystems, focusing on RTL, micro-architecture, synthesis, timing closure and SoC integration. Role sits in ASICS Engineering within Qualcomm's Engineering Group and is based in Hsinchu City, Taiwan.

Lead implementation and optimization of networking datapath and control logic, collaborate with architecture, firmware and validation teams, and mentor junior engineers.

Experience Level

Senior / Staff level. Typical experience range: 2–10 years of ASIC design experience, with the ability to independently drive complex design tasks and lead subsystem delivery.

Responsibilities

Key responsibilities include:

• Implement RTL design, synthesis, and timing closure for networking datapath and control logic.
• Design micro-architecture and RTL for forwarding engine, parser, traffic manager and other networking blocks.
• Participate in SoC integration with focus on Ethernet switch subsystems and feature scalability.
• Drive subsystem integration, performance tuning, and power optimization.
• Debug functional and performance issues across design, DV, and validation teams and support chip bring-up.
• Collaborate with architecture, firmware, and validation teams to refine features and support integration testing.
• Lead delivery of key subsystems and mentor junior engineers to uphold engineering best practices.

Requirements

Must-have skills and qualifications:

• Proven experience with ASIC development lifecycle: logic design, RTL coding, verification, synthesis, timing closure and physical design flow.
• Strong expertise in front-end ASIC design flow (RTL, simulation, static timing analysis, integration).
• Familiarity with Ethernet switching concepts such as L2/L3 forwarding, bridging, routing, packet processing pipelines and basic QoS (queuing, scheduling).
• Hands-on experience with Ethernet switching / networking ASICs: packet classification/forwarding pipelines, buffer management and QoS mechanisms.
• Strong debugging and system-level problem-solving skills across design and validation domains.
• Scripting and programming skills preferred (C/C++, Tcl, Perl).
• Excellent teamwork, interpersonal and communication skills; fluent in Chinese and English (written and verbal).
• Ability to work under tight schedules and manage stress to meet delivery timelines.
• Nice-to-have: knowledge of AXI/NoC, PCIe or other high-speed interfaces.

Education Requirements

MS/BS in Electrical Engineering preferred (MS preferred). Minimum qualifications specify degree plus experience alternatives: Bachelor's in Science, Engineering or related field with 4+ years ASIC-related experience; Master's with 3+ years; PhD with 2+ years. Related technical fields and equivalent practical experience are acceptable where indicated.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.