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ASIC Design Engineer, Low Power Audio AI Subsystems

Qualcomm
October 2, 2026
Full-time
On-site
Markham, Ontario, Canada
$90,100 - $135,100 CAD yearly
RTL Design Jobs, Level - Entry or Early Career

Job Title

ASIC Design Engineer, Low Power Audio AI Subsystems

Role Summary

Work on ultra-low-power audio and on-device AI subsystem IP within a low-power SoC. The role covers micro-architecture, RTL implementation, power analysis, and integration with SoC interfaces.

Join a team delivering low-power audio and AI features for mobile, compute, automotive, and IoT products.

Experience Level

Entry-level - 0–2 years of ASIC hardware design and/or implementation experience.

Responsibilities

Key responsibilities include designing, implementing, analyzing, and integrating low-power digital IP and subsystems.

  • Develop micro-architecture and module specifications for digital audio and AI IP blocks and SoC interfaces.
  • Implement modules and sub-systems in Verilog RTL and integrate IP from other teams.
  • Analyze performance, area, power, and cost trade-offs for implementations.
  • Identify and apply power-optimization techniques for ultra-low-power designs; perform power projection and what-if analyses.
  • Collaborate with verification teams to debug module, sub-system, and SoC tests pre- and post-silicon.
  • Work with implementation teams to review synthesis results, power metrics, and achieve static timing closure.
  • Correlate silicon debug results with functional and power objectives.

Requirements

Must-have technical skills and eligibility. Preferred skills listed separately.

  • 0–2 years of ASIC hardware design and/or implementation experience.
  • Proficient in Verilog or VHDL; able to write synthesizable, readable RTL.
  • Understanding of ASIC/VLSI design concepts.
  • Experience with logic synthesis using Synopsys and/or Cadence tools.
  • Legal authorization to work in Canada.

Nice-to-have:

  • Power analysis, power modeling, and low-power RTL design experience.
  • Clock-domain crossing techniques and post-silicon debug experience.
  • Experience with audio IP/DSP, audio interfaces (I2S, PCM, SLIMbus, SoundWire, codecs), and low-power AI/ML accelerators.
  • Familiarity with implementation and verification tools (DC, Fusion Compiler, Power Compiler, PrimeTime, ModelSim/Modeltech, VCS, power-theatre tools).
  • Design rule checks (Spyglass), formal tools (Formality, LEC), and power simulation tools.
  • Scripting skills (Python, Perl, Tcl) and C programming.
  • Knowledge of bus protocols (APB, AHB, AXI) and UVM.

Education Requirements

Bachelor's degree in Science, Engineering, or a related field (as stated in minimum qualifications).


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-10-02