ASIC Design Engineer Graduate (Video Silicon IP) — 2027 Start
ByteDanceJob Title
ASIC Design Engineer Graduate (Video Silicon IP) — 2027 Start
Role Summary
Join ByteDance's video silicon IP team in San Jose to design hardware accelerators and RTL for video encoding and processing. The team delivers high-performance, low-power video processing IP used in large-scale products.
Experience Level
Entry-level / Graduate — suitable for recent graduates or candidates completing their degree (approximately 0–2 years of experience).
Responsibilities
Primary responsibilities include design, cross-team collaboration, and applying ASIC design principles to video codec implementations.
- Design hardware accelerators for advanced video encoding and processing.
- Collaborate with architecture, algorithm, and verification teams to develop efficient video processing IP.
- Apply computer architecture and ASIC design techniques for image and video compression and processing.
Requirements
Technical skills and tools expected for the role. Education details are listed below.
- Knowledge of video codecs and hardware implications (must-have).
- RTL design experience with SystemVerilog or experience with High Level Synthesis (HLS) (must-have).
- Familiarity with verification methodologies such as UVM and interfacing technologies like DPI (must-have).
- Proficiency in Python for task automation and scripting (must-have).
- SystemC experience (nice-to-have).
- Interest or experience in ASIC design flow and low-power, high-performance optimization (must-have).
Education Requirements
Bachelor's degree in Computer Science, Electrical Engineering, or a related discipline — completed or in progress (graduate-entry role).
About the Company
Company: ByteDance
Headquarters: Beijing, China
ByteDance is a Beijing-based multinational internet technology company known for consumer apps like TikTok and Toutiao. The company develops AI-driven content platforms, advertising products, and research in machine learning, video technologies, and cloud services.
