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ASIC Design Engineer
Volantis Semiconductor
August 27, 2026
Full-time
Remote friendly (San Francisco, California, United States)
Worldwide
ASIC Design Jobs, Level - Mid-Career
Job Title
ASIC Design Engineer
Role Summary
Work on ASIC blocks for A-0 and A-1 wafer products across XPU, memory chiplet, and other dies. Own block-level design and drive integration from RTL through tapeout with cross-functional teams.
Experience Level
Mid-level. Years of experience not specified in the posting.
Responsibilities
Primary responsibilities include:
- Design, implement, and own ASIC block functionality for A-0 and A-1 wafer products (XPU, memory chiplets, other dies).
- Deliver RTL, constraints, and documentation required for advanced-node tapeouts.
- Collaborate with physical design, verification, firmware, and system teams to meet performance, power, and area (PPA) targets.
- Identify and apply PPA levers across the stack and propose optimizations.
- Develop and apply methodologies for fast design iterations and tapeout schedules.
- Participate in tapeout planning, signoff activities, and post-silicon bring-up.
Requirements
Must-have:
- Hands-on experience with multiple advanced-node tapeouts.
- Ownership of the ASIC design portion of at least one block in multiple advanced-node tapeouts.
- Practical understanding of PPA improvement levers across the design stack.
- Ability to design methods for rapid iteration and to drive them in a team setting.
Nice-to-have:
- Experience with large-die (reticle-max) ASIC design flows.
- Experience designing ASICs for AI workloads.
- Experience with multi-die, chiplet, or MCM designs.
Education Requirements
Not specified.
About the Company
Company: Volantis Semiconductor
Semiconductor hardware startup developing wafer-scale heterogeneous packages that integrate silicon and compound semiconductor dies for high-TDP AI platforms. Focus areas include advanced packaging design and process development, interposer technologies, thermal/mechanical challenges, and system co-design.
