Job Title
ASIC Design and Integration Engineer
Role Summary
Design, verify and integrate digital IP and custom SoCs to meet performance, power and area targets. Work within a cross-functional hardware and software engineering team to deliver production silicon.
Experience Level
Mid-level β approximately 3+ years of relevant industry experience.
Responsibilities
Primary responsibilities include:
- Design and implement complex ASIC digital blocks using SystemVerilog/Verilog.
- Perform RTL synthesis and optimize designs to meet timing, area and power goals.
- Coordinate with simulation-based and formal verification teams to validate designs.
- Integrate digital designs into SoC environments and collaborate with hardware and software teams for system integration and bring-up.
- Conduct static timing analysis, power analysis and PPA trade-offs.
- Create and maintain micro-architecture and design documentation.
- Support lab debug and silicon validation as required.
Requirements
Must-have technical skills and experience:
- Proven RTL design experience in SystemVerilog and Verilog.
- Experience with RTL-to-gate synthesis flows and related tools.
- Familiarity with simulation-based verification methodologies and collaboration with formal verification teams.
- Practical knowledge of timing analysis methodologies and power optimization techniques.
- Experience integrating digital IP into SoC environments and working across HW/SW teams.
- Strong documentation, debugging and communication skills.
Education Requirements
Minimum: Bachelor's degree (BS) required or equivalent practical experience. The posting specifies at least 3 years of relevant industry experience in addition to the BS requirement.
About the Company
Company: Apple
Headquarters: Cupertino, California, United States
Apple is a multinational technology company that designs, manufactures, and sells consumer electronics, software, and online services. Known for its innovative products such as the iPhone, Mac computers, and iPad, Apple emphasizes a strong commitment to high-quality design and user experience.

Date Posted: 2026-08-01