ASIC Chief Architect - Hod HaSharon

Job Title

ASIC Chief Architect

Role Summary

Lead the system-level architecture and technical direction for next-generation SoCs and ASIC platforms targeting high-performance compute, 6G communications, AI, networking, and embedded systems. Serve as the principal technical authority across architecture, technology roadmaps, and cross-functional tradeoffs.

Work closely with product management, silicon engineering, software, verification, and executive leadership; hire, mentor, and supervise architecture teams to delivery-ready silicon.

Experience Level

Senior — the role expects experienced candidates (advertised as 12+ years in semiconductor/ASIC/SoC/processor architecture; alternative minimums tied to degree are listed in the posting).

Responsibilities

Technical leadership and end-to-end system architecture ownership across multiple subsystems.

• Define end-to-end architecture from concept through production for complex ASIC/SoC products.
• Lead system architecture across compute, memory, networking, security, and accelerator subsystems.
• Drive architectural decisions for DSP, CPU, GPU, AI/ML acceleration, packet processing, memory hierarchy, NoC and interconnects.
• Develop performance, power, area (PPA) and cost optimization strategies.
• Analyze workloads and identify hardware acceleration opportunities; lead modeling and performance simulation.
• Drive hardware/software co-design and system partitioning; coordinate with design, verification, physical design, firmware and software teams.
• Define technology roadmaps, perform capacity planning, and mentor architecture teams.

Requirements

Must-have technical and leadership qualifications; degree details are summarized under Education Requirements below.

• 12+ years of experience in semiconductor, ASIC, SoC, or processor architecture (as principal contributor or technical leader).
• Proven experience leading architecture and development of complex silicon products from concept to production.
• Deep expertise in DSP architectures and signal-processing systems.
• Strong knowledge of CPU architectures (ARM, RISC-V, x86 or similar) and GPU / parallel processing architectures.
• Experience with hardware accelerators, heterogeneous computing, and high-performance SoC design.
• Strong understanding of memory subsystems (DDR4/DDR5, LPDDR, HBM), memory controllers and cache architectures.
• Expertise in packet processing, network processors, switching/routing, and traffic management.
• Familiarity with high-speed interfaces (PCIe, Ethernet, CXL, UCIe), NoC and chiplet architectures, power management and PPA optimization.
• Experience with system modeling, architectural simulation, performance analysis, HW/SW co-optimization, ASIC design flows and silicon bring-up.
• Demonstrated ability to mentor senior architects and influence long-term architectural strategy; track record of delivering commercial ASICs is preferred.

Education Requirements

The posting references degrees in Computer Engineering, Computer Science, Electrical Engineering or related fields: Bachelor's, Master’s (MS) and PhD are mentioned. It lists MS or PhD in required qualifications and a minimum-qualification matrix: Bachelor's + 6+ years OR Master's + 5+ years OR PhD + 4+ years. Equivalent practical experience is accepted where stated.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.