Architecture/System Validation Engineer

Job Title

Architecture/System Validation Engineer

Role Summary

Member of the ASICS Engineering validation team responsible for pre-silicon and post-silicon system validation of packet-processing forwarding behavior and performance. The role focuses on bring-up, feature enablement, regression execution, and delivery of validation infrastructure and automation.

Experience Level

Mid-level — typically 3+ years of relevant validation, bring-up, debug, system integration, or networking datapath validation experience; minimum experience requirements vary with degree (see Education Requirements).

Responsibilities

Execute system-level validation activities across models, emulation, and silicon; drive test strategy and defect closure.

• Perform pre-silicon and post-silicon bring-up, feature enablement, regression runs, and stability/performance testing focused on the Packet Processing Engine (PPE) forwarding plane.
• Develop and maintain validation content covering forwarding functions, performance, endurance, and stability; define validation plans from MRD/PRD and design specs.
• Execute PPE performance validation across packet sizes and stress patterns; document results and identify gaps/risks.
• Conduct protocol consistency testing with real protocol implementations and provide actionable debug evidence for inconsistencies.
• Lead end-to-end validation on emulation and silicon; coordinate triage, root-cause isolation, and resolution tracking with SW/HW/Design/DV and customer-facing teams.
• Develop and maintain automation, regression frameworks, dashboards, and reusable test infrastructure to enable unified validation across model, emulation, and chip phases.
• Feed system-level findings back into specifications and DV test intent to improve quality early in the development cycle.
• Mentor and guide other engineers on validation methodology and technical approaches.

Requirements

Core skills, tools, and behaviors required to perform the role.

• 3+ years experience in validation, bring-up, debug, system integration, or networking datapath validation (pre-silicon and/or post-silicon).
• Hands-on packet-based testing and debug experience: traffic generation, packet capture/analysis, counters/statistics interpretation, and forwarding behavior validation.
• Experience with emulation-based validation and/or board-based post-silicon validation and stability/performance testing.
• Strong scripting and automation skills; familiarity with C, Perl, Tcl, shell scripts, and makefiles for validation infrastructure and tools development.
• Familiarity with ASIC development and system/SoC datapath concepts.
• Analytical problem solving, clear technical communication to technical and non-technical audiences, and ability to work under tight schedules.
• Demonstrated ability to build collaborative working relationships and to mentor other engineers.
• Fluent Chinese and English, both verbal and written.

Education Requirements

MS or BS in Electrical Engineering, Computer Science, or a related field (MS preferred). Minimum qualifications: Bachelor's degree plus 6+ years relevant ASIC design/verification/validation/integration experience; OR Master's degree plus 5+ years; OR PhD plus 4+ years.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.