Architect - Memory Subsystem

Job Title

Memory Subsystem Architect

Role Summary

Contribute to and own aspects of the memory subsystem for a high-bandwidth memory system, including the distributed memory fabric, memory controllers, and interfaces to XPUs/compute complexes.

Experience Level

Senior-level (Architect). Specific years of experience not stated; role expects deep, hands-on experience in memory subsystem design and implementation.

Responsibilities

Key responsibilities include defining architecture and delivering components of the memory subsystem.

• Own and define architecture for distributed memory fabric and overall memory subsystem.
• Design and specify memory controllers and interfaces to XPUs/compute complexes.
• Analyze workload requirements (especially LLM inference) and translate them into memory-system requirements.
• Evaluate and architect memory tiering strategies and trade-offs for various workloads.
• Collaborate with system, SoC, and software teams to validate architecture and integration.
• Document architecture decisions, interfaces, and performance trade-offs.

Requirements

Must-have skills and experience, plus beneficial additional experience.

• Must-have: Deep knowledge and hands-on experience designing and implementing memory subsystems.
• Must-have: Clear understanding of LLM inference workloads and their impact on memory-system design.
• Must-have: Understanding of benefits and limitations of memory tiering across workloads.
• Nice-to-have: Experience with CXL and other memory pooling protocols.
• Nice-to-have: Experience designing and implementing memory controllers.
• Nice-to-have: Experience with processing-in-memory or other advanced memory-subsystem projects.

Education Requirements

Not specified.

About the Company

Company: Volantis Semiconductor

Semiconductor hardware startup developing wafer-scale heterogeneous packages that integrate silicon and compound semiconductor dies for high-TDP AI platforms. Focus areas include advanced packaging design and process development, interposer technologies, thermal/mechanical challenges, and system co-design.