Applied ML Director (Technical Team Lead)

Job Title

Applied ML Director (Technical Team Lead)

Role Summary

Lead a technical team within the ChipStack SuperAgent group to design, implement, and deliver production-grade AI agents and ML infrastructure that improve productivity across the semiconductor design lifecycle. This is a player-coach role combining hands-on system design and coding with technical leadership and team scaling.

Experience Level

Senior — expects 7+ years of hands-on software engineering and ML experience and 3+ years of direct engineering management or formal technical lead experience.

Responsibilities

Own the technical direction and delivery for agent infrastructure, evaluation systems, and production AI capabilities integrated with Cadence EDA platforms.

• Manage, mentor, and grow a team of ML and software engineers; hire and scale the team.
• Provide hands-on technical leadership: design architectures, implement features, and contribute production-quality code.
• Architect and implement evaluation frameworks, data pipelines, retrieval (RAG) systems, and context-engineering strategies for reliable agent behavior.
• Drive operational excellence: CI, automated testing, observability, monitoring, and failure analysis for ML systems.
• Make high-level architectural trade-offs across latency, cost, reliability, and scalability.
• Collaborate cross-functionally with product management, research, and core engineering to align the AI roadmap with platform goals.

Requirements

Key must-have technical and leadership qualifications, plus relevant additional skills.

• Must-have: 3+ years of direct engineering management or formal technical lead experience.
• Must-have: 7+ years of hands-on software engineering and ML experience with strong skills in designing, refactoring, debugging, and testing distributed systems.
• Must-have: Practical experience deploying and operating large language models (LLMs) in production, including addressing latency, cost, reliability, monitoring, and failure modes.
• Must-have: Experience designing rigorous evaluation frameworks, benchmarking, and regression testing for AI systems.
• Nice-to-have: Experience with agent architectures (reason–act loops, planning/self-correction, tool/function calling, persistent memory), prompt/context engineering, and model alignment techniques.
• Nice-to-have: Experience building RAG pipelines, embeddings/indexing strategies, chunking, and grounding techniques.
• Nice-to-have: Background in ML infrastructure and observability: logging, tracing, monitoring, and evaluation for ML applications.
• Nice-to-have: Interest or experience in semiconductor design, EDA workflows, or high-performance computing environments.

Education Requirements

MS or PhD in Computer Science, Computer Engineering, or a related technical field.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.