Applied AI Engineer, Silicon Engineering

Job Title

Applied AI Engineer, Silicon Engineering

Role Summary

Embed with hardware teams (RTL, verification, DFT, physical design, silicon validation) to design, build, and operate LLM-based agents and tooling that accelerate chip development. This is an internal engineering role focused on integrating AI into simulators, regressions, waveform/log analysis, EDA flows, and bring-up workflows.

Success is measured by measurable adoption and speed improvements for chip teams rather than standalone product metrics.

Experience Level

Mid-level. No specific years of experience stated.

Responsibilities

Deliver and maintain agentic systems that materially speed up hardware engineering workflows and drive adoption.

• Build, deploy, and maintain LLM-agent workflows for debug triage, testbench and coverage work, log/waveform analysis, EDA script generation, and knowledge retrieval.
• Embed with hardware teams to identify high-leverage pain points and convert them into automated workflows with measurable adoption.
• Design and run rigorous evaluations that measure agent performance on real silicon-engineering tasks and iterate based on results.
• Integrate agents with internal infrastructure: simulation/emulation flows, CI/regression systems, lab equipment, and issue trackers via tool-calling and MCP.
• Drive adoption through documentation, training, and rapid feedback loops with engineering users.

Requirements

Must-have skills and attributes for the role.

• Proven problem solver who can work across stacks and rapidly learn new technical domains.
• Comfortable reading, modifying, and debugging Python; able to direct AI to produce usable code.
• Hands-on experience building and shipping LLM-based agents or AI tooling that real users depend on (beyond simple API calls): context engineering, tool integration, orchestration, failure analysis.
• Fluency using AI to learn and ramp on problems; familiarity with agentic coding tools and frontier models.
• Eval-driven mindset: measures whether systems actually work before scaling them.
• High agency and ability to operate with ambiguity and find high-impact problems.
• Strong interest in chip development and willingness to learn hardware domains quickly.

Nice-to-have:

• Experience with RTL/SystemVerilog, functional verification (UVM), DFT, physical design/STA, FPGA, emulation, or silicon bring-up.
• Familiarity with EDA flows and Tcl scripting; experience reading waveforms, logs, and regressions.
• Experience with fine-tuning or post-training methods (SFT, RLHF/DPO), RAG over proprietary technical data, or multi-agent orchestration.
• Deep software engineering experience (C++ or Rust), developer-facing internal platforms, or large-scale CI/CD and infrastructure (Docker, Slurm, Ray).

Education Requirements

Not specified.

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.