Applications Engineer, Senior Engineer

Job Title

Applications Engineer, Senior Engineer

Role Summary

Senior applications engineer responsible for leading customer VCS simulation deployments and resolving complex verification and simulation issues. The role partners with design and verification teams, field application engineers, and R&D to enable successful tool adoption and ensure customer tape-outs stay on schedule.

Experience Level

Senior-level. Typical experience: 5+ years with a Bachelor’s or 3+ years with a Master’s in a relevant field (see Education Requirements).

Responsibilities

Primary responsibilities focus on customer deployments, debugging, performance tuning, and translating field issues into product improvements.

• Lead VCS simulation deployments at customer sites and integrate the tool into existing flows.
• Diagnose simulation mismatches, performance bottlenecks, and verification environment issues using VCS, Verdi, and debugging tools.
• Collaborate with field application engineers and R&D to validate fixes and convert customer feedback into product requirements.
• Conduct competitive evaluations and benchmarking to demonstrate simulation capabilities.
• Develop automation scripts to streamline customer workflows and improve simulation throughput.
• Support advanced verification methodologies including UVM, SVA, low-power, gate-level, and functional safety flows.

Requirements

Core technical skills and hands-on experience required for the role. Education details are listed under Education Requirements below.

• Deep hands-on experience with commercial simulators (VCS or equivalent) and understanding of event-driven simulation internals.
• Proficiency in SystemVerilog, UVM, SVA, and HDLs such as Verilog and VHDL; ability to read and debug complex testbenches and RTL.
• Proven track record debugging simulation mismatches, performance issues, and verification flow problems in production customer environments.
• Strong scripting skills in Perl, Tcl, shell scripting, and Make to automate workflows and build tooling.
• Working knowledge of UNIX/Linux, version control systems, and large-scale verification infrastructure.
• Ability to work directly with customers under schedule pressure and coordinate global teams across time zones.
• Nice-to-have: experience with Verdi, low-power simulation, gate-level verification, and functional safety methodologies.

Education Requirements

Bachelor's degree in Electronics or Computer Engineering (typical expectation: B.S. + 5+ years experience) or Master's degree (typical expectation: M.S. + 3+ years) with focus on digital design verification. Fields referenced: Electronics Engineering, Computer Engineering; relevant graduate degrees or equivalent industry experience in digital verification are acceptable.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.