Application Engineering, Principal Engineer

Job Title

Application Engineering, Principal Engineer

Role Summary

Principal-level application engineer in Customer Success / Applications Engineering focused on physical design implementation and methodology for advanced-node ASIC projects. The role supports sales, customer success, and account teams by applying Synopsys RTL-to-GDSII solutions to improve customers' power, performance, area, and schedule.

Work includes technical sales support, methodology development, training, and hands-on problem resolution with customers and internal product/R&D teams.

Experience Level

Senior — Principal level. Typically 7+ years of relevant ASIC physical-design or application-engineering experience; specific experience thresholds are listed under Education Requirements.

Responsibilities

Primary responsibilities supporting product adoption, customer engagements, and methodology development.

• Provide technical sales support: product demonstrations, evaluations, and competitive benchmarking.
• Develop and articulate advanced-node design methodologies using Synopsys full RTL-to-GDSII flows (fusion of synthesis, place & route, STA, and signoff).
• Support customers on placement, clock-tree synthesis, routing, timing closure, and advanced timing optimization techniques.
• Deliver training, on-site technical assistance, and problem resolution to customer engineering teams.
• Participate in account planning and collaborate with Account Managers to define solutions that meet customer requirements.
• Manage multiple concurrent customer activities and prioritize tasks across accounts.

Requirements

Must-have technical skills and customer-facing abilities. Education requirements are summarized separately below.

• Extensive physical design experience: placement, optimization, CTS, routing, and timing closure at advanced nodes (sub-5nm preferred).
• Strong knowledge of synthesis (logical and physical), static timing analysis, and constraints for timing and power signoff.
• Hands-on experience with Synopsys back-end tools and AI-driven methodologies for timing closure and optimization.
• Familiarity with clock-tree synthesis methodologies (H-Tree, MS-CTS) and noise/timing analysis techniques.
• Strong verbal and written communication and presentation skills; ability to work directly with customer engineers and managers.
• Customer sensitivity, ability to triage multiple issues, and aptitude for translating customer needs into technical solutions.
• Nice-to-have: front-end synthesis and equivalency check experience; familiarity with STA tools (PrimeTime, Tempus).
• Nice-to-have: hands-on knowledge of specific tools such as Fusion Compiler, ICC2, Innovus, Design Compiler, Genus.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) or equivalent with 10+ years of relevant experience, or Master of Science in Electrical Engineering (MSEE) or equivalent with 7+ years of relevant experience. Equivalent practical experience may be acceptable where stated.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.