Application Engineering Intern – AI-based Formal Verification
Join the Application Engineering team to research and prototype AI/ML-driven approaches that improve formal verification workflows for semiconductor design. Work with R&D and experienced engineers to evaluate techniques, integrate prototypes, and document results.
Internship / Entry-level — intended for students or early-career candidates currently pursuing a relevant degree.
Primary responsibilities include research, prototyping, and validation of ML-based verification tools and workflows.
Must-have technical skills and competencies for the role; preferred items listed after.
Currently pursuing a degree in Electrical/Electronic Engineering, Computer Science, or Computer Engineering (undergraduate level). The posting expects student status rather than completed degree; no alternative-equivalent-experience language was specified.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
