Application Engineer - System VIP, Perspec, Portable Stimulus (DV)

Job Title

Application Engineer - System VIP, Perspec, Portable Stimulus (DV)

Role Summary

Customer-facing Application Engineer on the North America Verification Field Applications Engineering team. Work directly with semiconductor and system customers to deploy Cadence verification platforms and verification methodologies, with emphasis on Portable Stimulus and related technologies.

Provide front-line technical support in pre-sales and post-sales engagements, develop customer-specific verification solutions, and drive customer success through hands-on evaluations, benchmarks, and demos.

Experience Level

Mid-level. The role requires 5+ years of relevant verification or embedded systems experience.

Responsibilities

Key responsibilities include:

• Deploy and integrate Cadence verification platforms (simulation, emulation, verification management, VIPs, Perspec/PSS) in customer environments.
• Develop customer-specific verification requirements and advanced verification components, including subsystem and SoC-level testbenches.
• Design, run, and debug verification tests and benchmarks for pre-silicon (simulation/emulation/FPGA) and post-silicon (bring-up boards) targets.
• Support technical evaluations, create performance/coherency/power characterization tests, and produce benchmark reports.
• Prepare and deliver technical presentations, product demonstrations, and training to customers and account teams.
• Collaborate with Cadence R&D and sales/account teams to propose and implement verification solutions for complex customer problems.

Requirements

Must-have technical skills and experience:

• 5+ years of experience developing verification at subsystem or SoC level, creating UVM/C tests targeting ARM/DSP/RISC-V cores.
• Hands-on experience developing, compiling, running, and debugging C/C++ bare-metal, firmware, or software tests and applications on pre- and post-silicon platforms.
• Practical knowledge of hardware register specifications, memory maps, and firmware/embedded software debug workflows.
• Experience running tests for performance, coherency, and power characterization in pre- and post-silicon setups.
• Customer-facing experience with strong communication and presentation skills.

Nice-to-have:

• Knowledge of Portable Stimulus Standard (PSS) and Perspec.
• Experience in developing C/C++ embedded software, bring-up, and hardware-software debugging.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) or equivalent required; posting specifies BSEE or equivalent with 5+ years of relevant experience. Equivalent practical experience in verification or embedded systems is acceptable per the posting.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.