Application Engineer I - Physical Verification (Sign-off)

Job Title

Application Engineer I - Physical Verification (Sign-off)

Role Summary

The Application Engineer I provides technical support, training, and deployment assistance for Cadence Custom IC and Signoff products with a focus on physical verification, parasitic extraction, and analog layout automation. The role partners with customers, account teams, and product development to resolve technical issues and enable production design flows.

Team/location: Custom Product Group (CPG) based in Belo Horizonte, Brazil. Employment category: CLT; 40 hours/week; onsite.

Experience Level

Mid-level — typically requires 3+ years of relevant experience in analog/mixed-signal IC layout, design, or CAD support.

Responsibilities

Primary responsibilities include technical customer enablement, product evaluation, and issue resolution.

• Support customers using Cadence Custom IC and Signoff tools (layout, verification, extraction).
• Deliver technical training, methodology services, presentations, demonstrations, and customized evaluations.
• Drive technical campaigns and product evaluations to address customer design challenges.
• Enable customer deployment of Cadence solutions into production flows, including debugging software and layout issues.
• Gather and communicate customer requirements and feedback to product and marketing teams to improve features and quality.

Requirements

Concise list of required and preferred skills. Degree information is listed separately under Education Requirements.

• Must-have:
  • 3+ years' experience in analog/mixed-signal IC layout/design or CAD support (experience with Cadence tools preferred).
  • Experience with physical verification and parasitic extraction.
  • Familiarity with UNIX environments.
  • Strong problem-solving skills and ability to work independently in a fast-paced environment.
  • Good verbal and written communication and teamwork skills.
• Nice-to-have:
  • Knowledge of SKILL, Python, or other programming languages.
  • Familiarity with Virtuoso Layout Suite, Pegasus/PVS, Quantus, or related Cadence products.

Education Requirements

Complete BSc (required); MSc/MEng preferred — fields: Electronic Engineering or Physics.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.