Analog / Mixed-Signal SerDes Design Engineer

Job Title

Analog / Mixed-Signal SerDes Design Engineer

Role Summary

Join Qualcomm's SerDes PHY team in Cork to design analog and mixed-signal IP for high-speed PHY receivers, drivers, VCOs, PLLs and related hard macros for mobile, automotive, IoT and compute SoCs. Work focuses on low-power, low-voltage designs in advanced FinFET/GAA process nodes (3nm and below).

The role combines transistor-level circuit design, simulation and silicon characterization with collaboration with layout, verification and integration teams to deliver production-ready SerDes and PLL IP.

Experience Level

Mid-level - candidates typically have 2+ years of relevant ASIC/analog design experience; a common profile is 2–5 years in transistor-level analog/mixed-signal design. Equivalent practical experience will be considered.

Responsibilities

Core day-to-day responsibilities include design, verification and delivery of analog/mixed-signal hard macros for SerDes IP and related blocks.

• Architect, design and develop analog/mixed-signal hard macros for SerDes and PHY IP.
• Perform custom transistor-level circuit design in advanced FinFET/GAA CMOS processes.
• Collaborate with layout engineers to ensure optimized custom analog layout and sign-off.
• Produce design specifications and behavioural models (Verilog) for integration.
• Set up, run and analyze SPICE/simulation results; perform verification and QA on hard macros.
• Support customer integration, system bring-up and silicon characterization; prepare verification reports.
• Participate in internal requirements and architecture discussions with cross-functional teams.

Requirements

Must-have skills and experience required to perform the role; candidates with equivalent experience will be considered.

• Must-have: Transistor-level analog/mixed-signal design experience (industry or equivalent research) with work on high-speed applications (SerDes, PLL, DDR or similar).
• Proficiency with SPICE simulators and schematic-capture tools; experience setting up and analyzing circuit simulations.
• Experience designing core analog blocks: op-amps, bandgaps, differential amplifiers, VCOs, PLLs.
• Block-level SerDes experience preferred: transmitters, receivers, VGA, CTLE, CDR and related high-speed building blocks.
• Full-custom analog layout skills and ability to perform layout extraction, verification and sign-off in advanced nodes.
• Scripting ability to automate design and verification tasks.
• Good communication skills and ability to work effectively in a multi-disciplinary engineering team.
• Nice-to-have: Knowledge of device physics, power distribution networks (PDN), signal integrity for high-speed wireline designs, and prior experience in nanometer FinFET/GAA nodes.

Education Requirements

Degree and experience combinations accepted: Bachelor's degree in Science, Engineering or a related field with typically 2+ years of ASIC/analog design or related experience; OR Master's degree in Science, Engineering or related field with typically 1+ year of relevant experience; OR PhD in Science, Engineering or related field. Equivalent practical experience may be accepted in lieu of formal qualifications. Fields referenced include electrical/analog engineering, computer engineering, physics and related technical disciplines.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.