Analog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) – TeraWave

Job Title

Analog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) – TeraWave

Role Summary

Senior mixed-signal / custom digital IC designer responsible for creating, validating, and delivering Liberty (.lib) timing models and related characterization collateral for custom analog-digital interface circuits used in complex ICs for the TeraWave satellite communications program.

The role works at the boundary of analog/mixed-signal design, custom digital design, static timing analysis (STA), and library characterization, collaborating with analog designers, digital implementation, STA, verification, and physical design teams.

Experience Level

Senior-level. Posting requests 7+ years of relevant experience.

Responsibilities

Primary responsibilities include transistor-level characterization, Liberty model generation, validation, automation, and cross-functional integration.

• Generate and maintain Liberty (.lib) timing models for custom digital and analog-digital interface circuits (input/output delay, clock-to-Q, setup/hold, recovery/removal, pulse-width, enable/disable, tristate/conditional arcs).
• Characterize timing across relevant PVT corners, input slew ranges, output loads, and parasitic-extracted views; model pin capacitance, transition behavior, leakage, and dynamic power.
• Build, debug, and run transistor-level SPICE/FastSPICE simulation testbenches; analyze waveforms and diagnose timing anomalies, non-monotonicity, race conditions, glitches, contention, and metastability issues.
• Validate .lib files against transistor-level simulation and downstream STA tools (PrimeTime, Tempus, Innovus, Fusion Compiler, or equivalent) and review STA results to ensure correct representation.
• Create automated characterization flows and reusable testbenches using scripting (Python, Tcl, Perl, shell, SKILL) and develop measurement methodologies for timing extraction.
• Collaborate with layout and physical design teams to model parasitic impact and support integration into synthesis, place-and-route, timing signoff, and verification flows.
• Document characterization methodology, simulation conditions, measurement definitions, validation summaries, and define standard practices; mentor junior engineers.

Requirements

Must-have technical skills and experience are listed first; preferred skills follow.

• 7+ years of relevant experience in custom IC design, mixed-signal design, standard-cell characterization, or digital timing methodology.
• Hands-on transistor-level simulation experience using SPICE-class tools (Spectre, HSPICE, Eldo, FineSim, XA, or equivalent) and ability to analyze SPICE waveforms and debug circuit behavior.
• Strong understanding of CMOS digital circuit design and timing concepts, including combinational logic, inverters, latches, flip-flops, transmission gates, clocked logic, setup/hold, clock-to-Q delay, propagation delay, slew/load dependence, recovery/removal timing, and minimum pulse-width checks.
• Experience generating or validating Liberty .lib files and performing PVT-based characterization and corner analysis.
• Scripting and automation experience in Python, Tcl, Perl, shell, SKILL, or similar.
• Ability to work effectively across analog, digital, verification, STA, and physical design teams and communicate technical results clearly.
• Ability to travel up to 10% and relocate if needed; technical assessment required as part of interviews.
• Preferred: experience with Cadence Virtuoso/ADE, Spectre, Cadence Liberate, Synopsys SiliconSmart, Solido Characterization Suite, PrimeTime/Tempus, extracted-netlist simulation (DSPF/SPEF), advanced CMOS nodes, level shifters, synchronizers, metastability modeling, reliability analysis (aging/EM/IR/noise), and creating Verilog/Verilog-A/SystemVerilog models to accompany timing models.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or a related technical field is specified in the posting; equivalent practical experience is not explicitly stated as an alternative. (Minimum Qualifications list requires BS or MS.)

About the Company

Company: Blue Origin

Headquarters: Kent, Washington, United States

Blue Origin is an American aerospace company developing technologies for spaceflight, including reusable launch vehicles, orbital and suborbital systems, and space infrastructure for commercial and government customers.