Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Job Title

Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Join the Acacia mixed-signal IC team designing high-speed optical transceivers for data center and long-haul networks. The role focuses on architecting, designing, laying out, measuring and productizing ultra-deep sub-micron CMOS analog/mixed-signal blocks.

This is a hybrid role with an expected in-office cadence of three days per week in San Jose, CA.

Experience Level

Senior — expects senior-level IC design experience; typically 7+ years of relevant mixed-signal/high-speed IC design experience.

Responsibilities

Key responsibilities include:

• Architect, design, simulate, layout and validate high-speed analog/mixed-signal IC blocks for optical transceivers.
• Lead design efforts for large/complex blocks, track deliverables and ensure design schedules are met.
• Perform peer reviews and establish robust design methodology from concept through production.
• Mentor and guide junior engineers on design, simulation and measurement practices.
• Collaborate with digital/DSP, system, package and module teams to meet signal and power integrity requirements.
• Create and execute lab validation and characterization plans; analyze performance across PVT.
• Contribute to design-for-manufacturability and productization activities.

Requirements

Must-have technical experience and skills:

• Proven experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (serdes, data converters), system link modeling, high-performance output drivers, phase-locked loops (PLLs), clock distribution, opamps/programmable gain amplifiers, and equalization techniques.
• Experience with architecting and delivering analog/mixed-signal blocks into production-quality CMOS ASICs.
• Strong debugging and measurement skills for high-speed analog circuits and system-level integration.
• Demonstrated ability to lead design teams, perform peer reviews, and coordinate cross-functional integration.

Nice-to-have / preferred:

• Experience with electrical transceiver applications (backplane and cable communications).
• Experience in FinFET and GAA process technologies.
• High-frequency layout experience including floorplanning, power/ground planning and routing, and passive components.
• Design-for-manufacturability skills: PVT characterization, electromigration, self-heating and IR drop analysis.
• Lab validation experience, ESD practices and constructing automated test setups.
• Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, mixed-signal AMS simulations, and Matlab.

Education Requirements

Minimums specified by employer: Bachelor's degree plus 8 years related experience, Master's degree plus 6 years related experience, or PhD plus 3 years related experience (equivalent practical experience accepted per employer guidelines).

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).