Job Title
Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)
Role Summary
Member of the Acacia mixed-signal IC design team responsible for architecting, designing, laying out, measuring, and productizing ultra-deep-submicron CMOS analog/mixed-signal circuits for high-speed optical transceivers (100G–1.6T+).
This is a hybrid role based in San Jose, CA (three days per week in office). You will collaborate with digital/DSP, system, package and module teams to deliver production-ready IC blocks that meet signal and power integrity targets.
Experience Level
Senior. See Education Requirements for explicit years-of-experience equivalencies.
Responsibilities
Accountable for development and delivery of complex mixed-signal IC blocks and for evolving design methodology across the project lifecycle.
- Architect, design, simulate, layout, verify, and productize high-speed analog/mixed-signal IC blocks.
- Lead design effort for large blocks on complex chips; track deliverables and schedules.
- Mentor engineers and participate in peer reviews to ensure robust design methodology.
- Collaborate with packaging, hardware, digital/DSP, and system teams to meet SI/PI and system requirements.
- Define and execute lab validation and test setups; support characterization and production qualification.
Requirements
Must-have technical experience and core skills.
- Proven experience designing, simulating, and measuring high-speed analog/mixed-signal ICs.
- Experience in at least three of the following areas: serial links (SERDES, serializers/deserializers, data converters), high-performance output drivers, phase-locked loops (PLLs), efficient clock transmission/propagation, op‑amps and programmable gain amplifiers (PGAs), equalization techniques.
- Ability to take designs from concept through production, including floorplanning for high‑frequency layouts and ensuring manufacturability.
- Practical lab experience with test setup construction and measurement/validation methodologies.
Nice-to-have / preferred:
- Experience with electrical transceiver applications (backplane and cable communications).
- Experience in FinFET and GAA process technologies.
- High-frequency layout experience including power/ground planning, analog/digital routing, and passive component integration.
- Design-for-manufacturability experience: PVT characterization, electromigration, self-heating, IR drop analysis.
- Familiarity with ESD practices and mixed-signal lab validation.
- Experience with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations, and MATLAB.
Education Requirements
Degree and experience equivalencies: Bachelor's degree plus 8 years related experience, Master's degree plus 6 years related experience, or PhD plus 3 years related experience; equivalent practical experience considered. The posting does not specify particular fields of study.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-06-03