Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)
Cisco SystemsJob Title
Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Join the Acacia mixed-signal IC design team to architect, design, lay out, measure and productize ultra-deep sub-micron CMOS analog and mixed-signal ICs for high-speed optical transceivers (100G–1.6T+). The team collaborates with digital/DSP, system, package, and module groups to deliver production-ready silicon.
This is a hybrid role based in San Jose, CA (three days per week on-site) focused on high-speed AMS circuits and system-level integration for optical communications.
Experience Level
Senior — typical experience expectation: B.S. + 8 years, M.S. + 6 years, or Ph.D. + 3 years of relevant experience (see Education Requirements for full details).
Responsibilities
Primary responsibilities include hands-on IC design, technical leadership on complex blocks, and cross-functional integration through to production.
- Architect, design, layout, simulate, and productize high-speed analog/mixed-signal CMOS ICs.
- Lead design efforts for large blocks, mentor junior engineers, and track technical deliverables.
- Perform circuit and system simulations, lab characterization, and debug to validate designs.
- Participate in peer design reviews and enforce robust design methodology from concept to production.
- Collaborate with packaging, hardware, digital/DSP, and system teams to meet signal and power integrity requirements.
- Define and validate clocking/PLL schemes, high-speed I/O, equalization, and amplifier solutions.
Requirements
Key technical requirements and preferred skills. Degree requirements are summarized under Education Requirements below.
- Proven experience designing, simulating, and measuring high-speed ICs in at least three of the following areas: high-speed serial links (serializers/deserializers, data converters), system link modeling, high-performance output drivers, phase-locked loops (PLLs), clock transmission/propagation, opamps/programmable gain amplifiers, and equalization techniques.
- Strong mixed-signal circuit design skills for high-speed, high-accuracy applications in advanced CMOS processes.
- High-frequency layout and floorplanning experience, including power/ground planning and analog/digital signal routing.
- Experience with laboratory validation, test setup construction, and ESD-aware design practices.
- Proficiency with design and simulation tools such as Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulation flows, and MATLAB.
Nice-to-have:
- Experience with FinFET and GAA process technologies.
- Design-for-manufacturability experience: characterization over PVT, IR drop, electromigration, and self-heating analysis.
- Experience with transceiver applications including backplane and cable communications.
Education Requirements
Required experience mapping: Bachelor's degree plus 8 years of related experience, Master's degree plus 6 years of related experience, or PhD plus 3 years of related experience. Equivalent practical experience will be considered where stated. (The posting does not specify particular fields of study.)
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).
