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Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Cisco Systems
June 10, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$168,800 - $241,200 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of the Acacia mixed-signal IC design team responsible for architecting, designing, laying out, measuring and productizing ultra-deep-submicron CMOS analog/mixed-signal circuits for high-speed optical transceivers (100G–1.6T+).

This is a hybrid role based in San Jose, CA (three days per week on-site). The role requires cross-functional collaboration with digital/DSP, system, package and module teams to meet signal and power integrity and production requirements.

Experience Level

Senior-level. The posting defines degree-based experience thresholds (see Education Requirements); equivalent senior hands-on IC design experience is expected.

Responsibilities

Primary responsibilities focus on end-to-end mixed-signal block delivery and cross-functional integration.

  • Architect, design, simulate, layout review, and characterize high-speed analog/mixed-signal blocks in advanced CMOS processes.
  • Lead design efforts for large blocks on complex chips; mentor junior engineers and track deliverables.
  • Perform peer reviews and establish robust design methodology from concept through production.
  • Collaborate with packaging and hardware teams to ensure signal and power integrity requirements are met.
  • Develop laboratory validation/test setups and participate in measurement, characterization and product bring-up.
  • Drive design-for-manufacturability activities including PVT characterization, IR drop and reliability considerations.

Requirements

Must-have technical experience and practical skills for this role. Degree-related requirements are summarized separately under Education Requirements.

  • Proven experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (SERDES), serializers/deserializers/data converters, high-performance output drivers, phase-locked loops (PLLs), efficient clock distribution, op amps/programmable gain amplifiers, and equalization techniques.
  • Hands-on experience with high-frequency layout and floorplanning (power/ground, mixed-signal routing) and passive components relevant to transceiver design.
  • Laboratory validation experience including test setup construction and ESD best practices.
  • Experience with design-for-manufacturability practices: PVT characterization, electromigration, self-heating and IR-drop analysis.
  • Strong familiarity with mixed-signal simulation and layout toolflows (see preferred tools); ability to debug silicon and iterate on design.

Preferred:

  • Experience with electrical transceiver applications (backplane and cable communications) and high-speed optical/electrical link modeling.
  • Experience with FinFET or GAA process technologies and high-frequency layout tools and methodologies.
  • Proficiency with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS mixed-signal simulations, and MATLAB.

Education Requirements

Minimum qualifications specify one of the following degree + experience combinations: Bachelor's degree + 8 years of related experience, Master's degree + 6 years of related experience, or PhD + 3 years of related experience. No specific field-of-study was mandated; role implies electrical/computer engineering or related technical background. No mandatory certifications were listed.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-06-09