Job Title
Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Join the Acacia mixed-signal IC design team developing high-speed analog and mixed-signal circuits for optical transceivers (100G–1.6T+). This is a hybrid role based in San Jose, CA (three days per week on site).
The role covers architecture, design, layout, measurement and productization of ultra-deep-submicron CMOS AMS blocks and requires collaboration with digital/DSP, system, package and module teams.
Experience Level
Senior-level. Candidates typically meet the experience thresholds listed under Education Requirements; this role expects substantial hands-on IC design experience and technical leadership.
Responsibilities
Core responsibilities include delivering complex mixed-signal IC blocks from concept to production and ensuring they meet system and manufacturing requirements.
- Architect, design, simulate, layout, and characterize high-speed analog/mixed-signal circuits and blocks.
- Lead design efforts for large blocks, mentor junior engineers, track schedules and deliverables.
- Participate in peer reviews and enforce robust design methodology and verification practices.
- Collaborate with digital/DSP, package and module teams to meet signal and power integrity requirements.
- Develop test plans, execute lab validation, debug silicon, and support productization and manufacturing handoff.
- Perform design-for-manufacturability analyses including PVT characterization, EM/IR, and reliability considerations.
Requirements
Must-have technical skills and experience for successful performance in this role.
- Hands-on experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (SERDES, ADC/DAC), link/system modeling, high-performance output drivers, PLLs, clock distribution, op amps/programmable gain amplifiers, and equalization techniques.
- Proven track record developing high-speed AMS circuits for electrical or optical transceiver applications.
- Experience with high-frequency layout, floorplanning, and analog/digital signal routing.
- Practical lab validation experience: building test setups, silicon bring-up, and applying ESD/test methodology.
Nice-to-have:
- Experience with FinFET or GAA process technologies.
- Familiarity with design-for-manufacturability tools and analyses (electromigration, self-heating, IR drop).
- Experience with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, mixed-signal AMS simulation flows, and MATLAB.
Education Requirements
Minimum qualification: Bachelor's degree plus 8 years related experience, or Master’s degree plus 6 years related experience, or PhD plus 3 years related experience. Specific fields of study were not specified in the posting.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-28