Job Title
Analog/Mixed-Signal IC Design Engineer β Acacia (Hybrid)
Role Summary
Work on Acacia's mixed-signal IC design team to architect, design, layout, measure and productize ultra-deep-submicron CMOS analog and mixed-signal circuits for high-speed optical transceivers (100Gβ1.6T+). This is a hybrid role based in San Jose, CA (three days in office per week).
Experience Level
Senior β the posting specifies substantial experience: Bachelor's + 8 years, Master's + 6 years, or PhD + 3 years of relevant experience.
Responsibilities
You will deliver and validate high-speed analog/mixed-signal blocks and work closely with cross-functional teams to integrate designs into products.
- Architect, design, simulate, and layout high-speed AMS circuits and blocks for optical transceivers.
- Lead design efforts for large, complex blocks; mentor junior engineers and track deliverables.
- Perform silicon bring-up, laboratory validation and characterization to production quality.
- Participate in peer design reviews and establish robust design methodology from conception to production.
- Collaborate with digital/DSP, system, package and module teams to meet signal and power integrity specifications.
- Work on testbench development, measurement setups, and validate designs across PVT and operating conditions.
Requirements
Key technical requirements and proven capabilities for the role.
- Experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (serdes, serializers/deserializers, data converters), system link modeling, high-performance output drivers, phase-locked loops, clock transmission/propagation, opamps/programmable gain amplifiers, and equalization techniques.
- Proven ability to lead complex IC design blocks, mentor teammates, and drive projects to production.
- Strong mixed-signal design skills across architecture, circuit design, layout considerations, verification and silicon bring-up.
- Practical experience with laboratory validation, test setups and ESD-aware test methodology.
Nice-to-have:
- Experience with electrical transceiver applications (backplane and cable communications).
- Experience with FinFET and GAA technologies and high-frequency layout (floorplanning, power/ground, analog/digital routing, passive components, transmission lines).
- Design-for-manufacturability experience including PVT characterization, electromigration, self-heating and IR-drop analysis.
- Familiarity with Cadence Virtuoso, Spectre/SpectreX/APS, Calibre, EMX, mixed-signal AMS simulations and Matlab.
Education Requirements
Required: Bachelor's + 8 years related experience, Master's + 6 years related experience, or PhD + 3 years related experience as specified in the posting. The posting does not specify particular fields of study or list certifications.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-03