Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Job Title

Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Role Summary

Member of the Acacia Mixed-Signal Design team responsible for architecting, designing, laying out, measuring and productizing high-speed analog/mixed-signal CMOS circuits for optical transceivers (100G–1.6T+ applications).

This is a hybrid role (three days per week) based in the San Jose, CA office. The role requires cross-functional collaboration with digital/DSP, system, package and module teams.

Experience Level

Senior — minimum experience requirements: Bachelor's + 8 years related experience; Master's + 6 years; PhD + 3 years.

Responsibilities

Key technical and leadership responsibilities for the IC design block and for taking designs from concept to production.

• Architect and design high-speed analog/mixed-signal circuits (including designs operating at or above ~25 Gb/s) in ultra-deep-submicron CMOS.
• Create schematics, perform simulations, produce layouts, and validate devices through measurement and characterization.
• Lead a major block on complex chips: set technical direction, track deliverables, and mentor junior engineers.
• Participate in peer reviews, silicon debug, and provide robust design methodology from conception to production.
• Coordinate with packaging and hardware teams to meet signal and power integrity requirements.
• Support productization activities including DFM analysis and qualification tests.

Requirements

Must-have technical skills and relevant tools. Education and years-of-experience are summarized in the Education Requirements section below.

• Proven experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (SERDES), system link modeling, high-performance output drivers, phase-locked loops, clock distribution, opamps/programmable gain amplifiers, or equalization techniques.
• Strong analog/mixed-signal circuit design skills for advanced CMOS processes.
• High-frequency layout experience including floorplanning, power/ground and mixed-signal routing; familiarity with passives (inductors, transformers, transmission lines).
• Design-for-manufacturability experience: characterization across PVT, electromigration analysis, self-heating, and IR drop analysis.
• Laboratory validation experience including ESD best practices and construction of test setups (preferred).
• Tool experience (preferred): Cadence Virtuoso, Spectre/APS/SpectreX, Virtuoso/Calibre LVS/DRC, EMX, AMS simulation flows, and MATLAB.
• Strong debugging, problem-solving skills, and effective cross-functional communication.

Education Requirements

Minimum qualifications: Bachelor's degree plus 8 years related experience; Master's degree plus 6 years related experience; PhD plus 3 years related experience. (Degrees specified in the posting; no specific field-of-study was required in the source.)

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).