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Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Cisco Systems
July 21, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$168,800 - $241,200 USD yearly
VLSI Design Jobs, Level - Senior

Job Title

Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Join Acacia's Mixed Signal Design team to architect, design, layout, and productize high-speed analog/mixed-signal CMOS circuits for optical transceivers (100G–1.6T+). The role works closely with digital/DSP, system, packaging and module teams to deliver production silicon for data center and telecom networks.

Experience Level

Senior-level. Typical background: B.S. +8 years, M.S. +6 years, or Ph.D. +3 years of relevant IC design experience.

Responsibilities

Primary responsibilities:

  • Architect, design, layout and verify high-speed analog/mixed-signal blocks (SERDES, drivers, PLLs, ADC/DAC, opamps/PGAs, equalizers).
  • Perform circuit simulation, mixed-signal verification, and prepare designs for tapeout and production.
  • Lead large-block efforts, mentor team members, track deliverables and participate in peer design reviews.
  • Collaborate with digital/DSP, packaging, and hardware teams to meet signal integrity, power, and thermal specifications.
  • Develop lab validation and characterization plans; support measurement, debugging and productization across PVT and reliability conditions.

Requirements

Must-have technical skills and experience:

  • Design, simulation and measurement experience for high-speed ICs in at least three of: serializers/deserializers/data converters, system link modeling, high-performance output drivers, PLLs, clock distribution, opamps/programmable gain amplifiers, or equalization techniques.
  • High-frequency layout experience including floorplanning, power/ground and mixed-signal routing, and layout validation practices.
  • Proficiency with design and simulation tools such as Cadence Virtuoso, Spectre/SpectreX/APS, AMS mixed-signal flows, Calibre and Matlab.
  • Experience with characterization across PVT, DFM/DFY considerations, electromigration and IR-drop analysis.
  • Ability to lead projects, produce design documentation, and collaborate across disciplines.

Nice-to-have:

  • Experience with FinFET or GAA process nodes.
  • Background in electrical transceiver applications (backplane, cable communications) and ESD/test methodology.
  • Experience with EM extraction tools (EMX) and advanced laboratory test setups.

Education Requirements

Minimums stated: Bachelor’s degree plus 8 years of related experience, or Master’s plus 6 years, or PhD plus 3 years. Equivalent practical experience is accepted per the posting.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-07-18