Analog/Mixed-Signal IC Design Engineer, Acacia (Hybrid)

Job Title

Analog/Mixed-Signal IC Design Engineer, Acacia (Hybrid)

Role Summary

Member of a small mixed-signal IC design team developing high-speed, high-accuracy analog circuits for optical transceivers (100G–1.6T+). Work spans architecture, circuit design, layout, measurement and productization of ultra-deep sub-micron CMOS ICs.

This is a hybrid role requiring three days per week in the San Jose, CA office and involves cross-functional collaboration with digital/DSP, system, package and module teams.

Experience Level

Senior level. Typical experience guidance: B.S. + 8 years, M.S. + 6 years, or Ph.D. + 3 years in related IC design roles.

Responsibilities

Key responsibilities include end-to-end mixed-signal IC design and delivery for optical transceiver products.

• Architect, design, simulate, lay out, characterize, and productize high-speed analog and mixed-signal blocks in advanced CMOS processes.
• Lead design efforts for large blocks on complex chips; define deliverables and schedule, and mentor junior engineers.
• Perform peer reviews and establish robust design methodology from concept through production.
• Collaborate with packaging and hardware teams to meet signal and power integrity specifications.
• Develop and validate laboratory test setups; participate in measurements, ESD practices, and validation of silicon over PVT.
• Contribute to manufacturability analyses including electromigration, self-heating, and IR drop assessments.

Requirements

Must-have technical experience and skills. Candidates should satisfy at least three of the listed technical areas.

• Design, simulation and measurement of high-speed ICs in multiple areas such as:
  • High-speed serial links (serializers/deserializers, data converters)
  • High-performance output drivers
  • High-performance phase-locked loops (PLLs)
  • Clock distribution and propagation techniques
  • Op amps and programmable gain amplifiers (PGAs)
  • Equalization techniques
  • Modeling for system link simulations
• Hands-on experience with high-frequency layout practices, floorplanning, and passive components (inductors, transformers, transmission lines).
• Experience in lab validation and construction of test setups; familiarity with ESD practices.
• Proficiency with design/simulation/layout tools typically used in mixed-signal IC work (examples: Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations, MATLAB).
• Nice-to-have: experience with FinFET/GAA technologies, design-for-manufacturability characterization, and transceiver/backplane/cable communications applications.

Education Requirements

Minimum qualifications specified: Bachelor's degree plus 8 years of related experience; Master's degree plus 6 years; or Ph.D. plus 3 years of related experience. (Degree in engineering, physics, or a related technical field is implied by role requirements; equivalent related experience acceptable per the listed combinations.)

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).