Job Title
Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Member of the Acacia mixed-signal IC design team developing high-speed analog circuits for optical transceivers (100G–1.6T+). The role focuses on architecting, designing, laying out, measuring and productizing ultra-deep-submicron CMOS analog/mixed-signal blocks and delivering them into production.
This is a hybrid role based in San Jose, CA (three days per week on-site) working closely with digital/DSP, package, system and module teams.
Experience Level
Senior — typically requires 8+ years of relevant industry experience.
Responsibilities
Primary responsibilities for the role include:
- Architect, design, layout, and validate high-speed analog/mixed-signal IC blocks for optical transceivers.
- Lead design efforts for large/complex blocks, track schedule and deliverables, and mentor junior engineers.
- Perform peer reviews and define robust design methodology from concept through production.
- Collaborate with digital/DSP, package, system and module teams to meet signal and power integrity targets.
- Develop test plans, participate in laboratory validation and characterization, and resolve issues found in silicon.
- Support design-for-manufacturability work including PVT characterization, IR drop and electromigration analysis.
Requirements
Must-have technical skills and experience:
- Proven experience designing, simulating, and measuring high-speed ICs. Must demonstrate experience in at least three of the areas listed below:
- High-speed serial links (serializers, deserializers, data converters)
- Modeling requirements for system link simulations
- High-performance output drivers
- High-performance phase-locked loops (PLLs)
- Efficient clock transmission and propagation
- Op amps and programmable gain amplifiers (PGAs)
- Equalization techniques
- Experience collaborating with packaging and hardware teams to meet signal and power integrity specifications.
- Demonstrated ability to take complex analog blocks from concept through production including measurement and silicon bring-up.
Nice-to-have:
- Experience with electrical transceiver applications (backplane and cable communications).
- Experience with FinFET and GAA technologies.
- High-frequency layout experience, including floorplanning and passive components (inductors, transformers, transmission lines).
- Experience with lab validation practices including ESD methodology and custom test setups.
- Familiarity with design and simulation tools such as Cadence Virtuoso, Spectre/APS/SpectreX, Virtuoso/Calibre layout validation, EMX, AMS simulations, and MATLAB.
Education Requirements
Minimum qualification structure: Bachelor's degree plus 8 years related experience, or Master’s degree plus 6 years related experience, or PhD plus 3 years related experience. The posting does not specify required fields of study or certifications.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-03