Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Job Title

Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of Acacia's Mixed Signal Design team developing high-speed, high-accuracy analog CMOS circuits for optical transceivers (100G–1.6T+). Work spans architecture, circuit design, layout, measurement and productization, and requires cross-disciplinary collaboration with digital/DSP, system, package and module teams.

Hybrid role based in San Jose, CA (three days per week on-site). Posted starting salary range for U.S./Canada: $168,800–$241,200 (yearly).

Experience Level

Senior-level. Typical experience expectation is 8+ years of relevant IC design experience (requirements vary by qualification; see Education Requirements).

Responsibilities

The role leads complex mixed-signal design blocks from concept through production and collaborates with adjacent teams to meet system-level signal and power integrity requirements.

• Architect, design, layout review, and productize ultra-deep-submicron CMOS analog/mixed-signal IP for high-speed optical transceivers.
• Lead design efforts for large blocks, mentor junior engineers, track deliverables, and participate in peer design reviews.
• Perform circuit simulation, verification, and lab characterization; iterate designs based on measurement data.
• Collaborate with packaging, hardware, digital/DSP and system teams to meet signal, power integrity, and interface specifications.
• Define test plans and support laboratory validation, including ESD practices and construction of test setups.
• Ensure designs meet manufacturability and reliability targets (PVT characterization, electromigration, IR drop).

Requirements

Must-have technical skills and experience for successful performance in this role.

Must-have

• Practical experience designing, simulating and measuring high-speed ICs, including work in at least three of these areas: high-speed serial links (serdes, data converters), modeling for link simulations, high-performance output drivers, PLLs, clock distribution, opamps/programmable gain amplifiers, and equalization techniques.
• Experience with Cadence Virtuoso, Spectre/APS/SpectreX or equivalent analog simulators, AMS mixed-signal simulation flow, and layout validation tools (Virtuoso, Calibre).
• Hands-on measurement and lab validation experience for high-speed analog/mixed-signal circuits.
• Ability to lead complex design blocks, perform peer reviews, and mentor team members.

Nice-to-have

• Experience with electrical transceiver applications (backplane and cable), FinFET/GAA technologies, high-frequency layout and floorplanning, EMX/EM simulation tools, and Matlab-based analysis.
• Experience in design-for-manufacturability, PVT characterization, electromigration and IR-drop analysis, and advanced ESD methodology.

Education Requirements

Bachelor's, Master's, or PhD in a technical discipline (e.g., electrical/computer engineering, physics or similar) with the following experience guidance: Bachelor's +8 years relevant experience; Master's +6 years; PhD +3 years. (Degrees and exact combinations specified by the employer.)

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).