Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Job Title

Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of the Acacia Mixed Signal Design team responsible for architecting, designing, laying out, measuring and productizing ultra-deep sub-micron CMOS analog/mixed-signal ICs for high-speed optical transceivers (100G–1.6T+).

Work within a small IC design group and with cross-functional teams (digital/DSP, system, package, module) to deliver production-ready blocks that meet signal and power integrity targets. This is a hybrid role based in San Jose, CA (three days per week on-site).

Experience Level

Senior level — multiple years of relevant IC design experience. Candidates typically meet the posted degree-plus-experience thresholds (see Education Requirements).

Responsibilities

Design, validate and productize high-speed analog/mixed-signal IC blocks and lead technical efforts for large blocks on complex chips.

• Architect, design, layout and bring up high-speed AMS circuitry (serial links, drivers, PLLs, clocks, opamps/PGAs, equalizers).
• Create and run simulations, model system link behavior, and verify performance across PVT conditions.
• Perform measurement and laboratory validation; develop and execute test setups and measurement plans.
• Collaborate with packaging and hardware teams to meet signal and power integrity specifications.
• Lead and mentor team members, track deliverables, participate in peer reviews and ensure solid design methodology from concept to production.
• Contribute to layout planning and high-frequency layout decisions affecting performance and manufacturability.

Requirements

Technical must-haves and practical skills for the position. Degree-plus-experience details are under Education Requirements below and have been removed from this section.

• Proven experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (serdes, data converters), system link modeling, high-performance output drivers, high-performance PLLs, clock transmission/propagation, opamps/programmable gain amplifiers, and equalization techniques.
• Experience with ultra-deep sub-micron CMOS process design and mixed-signal simulation environments.
• Ability to lead a large block: mentor engineers, track schedules, perform design reviews, and ensure production readiness.
• Hands-on laboratory validation experience, including test setup construction and measurement practice.
• Strong problem-solving skills, attention to detail, and ability to work in a collaborative, cross-functional environment.

Nice-to-have

• Experience with electrical transceiver applications (backplane, cable communications).
• Experience with FinFET and GAA technologies.
• High-frequency layout experience including floorplanning, routing, and passive components (inductors, transformers, transmission lines).
• Design-for-manufacturability skills: characterization over PVT, electromigration, self-heating, IR-drop analysis.
• ESD practices and test methodology experience.
• Familiarity with tools: Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations and MATLAB.

Education Requirements

Minimum: Bachelor's degree plus 8 years of related experience, or Master's degree plus 6 years of related experience, or PhD plus 3 years of related experience (related experience in high-speed analog/mixed-signal IC design).

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).