Job Title
Analog/Mixed-Signal IC Design Engineer β Acacia (Hybrid)
Role Summary
Member of the Acacia mixed-signal IC design team working on high-speed optical transceivers (100Gβ1.6T+). Responsible for architecture, circuit design, layout, measurement and productization of ultra-deep-submicron CMOS analog/mixed-signal blocks for transceiver ASICs.
This is a hybrid role (three days per week in the San Jose, CA office). Starting salary range for U.S. and Canada locations is $168,800β$241,200 (location-specific ranges may vary).
Experience Level
Senior-level. See Education Requirements for the degree-and-experience combinations required for this role.
Responsibilities
Key responsibilities include design, verification, and productization of high-speed AMS circuits and leading complex IC blocks.
- Architect, design, and simulate high-speed analog/mixed-signal circuits and blocks for optical transceivers.
- Develop layouts and perform layout validation to prepare designs for tape-out and production.
- Lead efforts for large blocks on complex chips; mentor team members and track deliverables.
- Participate in peer reviews and establish robust design methodology from concept through production.
- Collaborate with digital/DSP, system, package and module teams to meet signal and power integrity requirements.
- Create lab test plans, validate silicon, and support characterization over PVT and manufacturing testing.
Requirements
Core technical requirements and preferred skills. Candidates should meet the must-have items and ideally several of the nice-to-have items.
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Must-have: Proven experience designing, simulating, and measuring high-speed ICs in at least three of the following areas: high-speed serial links (serializers/deserializers and data converters), modeling for system link simulations, high-performance output drivers, phase-locked loops, efficient clock transmission/propagation, opamps and programmable gain amplifiers, and equalization techniques.
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Must-have: Hands-on experience with mixed-signal design and simulation tools such as Cadence Virtuoso and Spectre/APS/SpectreX, mixed-signal (AMS) simulation flows, and layout validation tools (Calibre).
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Nice-to-have: Experience with FinFET or GAA process technologies and high-frequency layout including floorplanning, passive components (inductors, transformers), and transmission lines.
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Nice-to-have: Design-for-manufacturability experience (characterization over PVT, electromigration, self-heating, IR drop) and laboratory validation skills including ESD methodology and test setup construction.
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Nice-to-have: Experience with EMX, Matlab, mixed-signal verification flows, and electrical transceiver applications (backplane and cable communications).
Education Requirements
Minimum: Bachelor's degree plus 8 years of related experience, or Master's degree plus 6 years of related experience, or PhD plus 3 years of related experience.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-06-11