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Analog/Mixed-Signal IC Design Engineer, Acacia

Cisco Systems
June 08, 2026
Full-time
Remote friendly (San Jose, California, United States)
United States
$168,800 - $241,200 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Analog/Mixed-Signal IC Design Engineer, Acacia

Role Summary

Design analog and mixed-signal integrated circuits for Acacia high-speed optical transceivers (100G–1.6T+). Work in a small mixed-signal IC design team to deliver CMOS products from architecture through productization.

Hybrid role based in San Jose, CA, collaborating with digital/DSP, system, package and module teams to meet signal and power integrity and production requirements.

Experience Level

Senior — role expects technical leadership, mentoring responsibilities, and multiple years of related IC design experience (see Education Requirements for specific experience thresholds).

Responsibilities

Primary responsibilities focus on leading and delivering high-speed AMS IC blocks and ensuring their integration into production ASICs.

  • Architect, design, simulate, lay out, measure and productize ultra-deep sub-micron CMOS analog/mixed-signal blocks.
  • Lead efforts for large or complex chip blocks; mentor team members and track deliverables.
  • Conduct peer reviews and establish robust design methodology from concept to production.
  • Collaborate with packaging and hardware teams to meet signal and power integrity specifications.
  • Support lab validation and troubleshooting to resolve measurement, integration, and manufacturability issues.

Requirements

Technical must-haves and preferred skills. Degree and years-of-experience requirements are listed under Education Requirements and have been removed from this section.

  • Design, simulation and measurement experience in high-speed ICs covering at least three areas such as: high-speed serial links (SERDES, serializers/deserializers, ADCs/DACs), system link modeling, high-performance output drivers, PLLs, clock distribution, opamps/PGAs, and equalization techniques.
  • High-frequency layout experience including floorplanning, power/ground and analog/digital signal routing, and passive component placement.
  • Proven ability to lead chip-block designs and work cross-functionally to meet product requirements and timelines.
  • Strong problem-solving skills and hands-on debugging of lab measurements and integration issues.

Nice-to-have:

  • Experience with FinFET and GAA technologies.
  • Design-for-manufacturability experience (PVT characterization, electromigration analysis, self-heating, IR drop analysis).
  • Laboratory validation experience including ESD practices and construction of complex test setups.
  • Familiarity with Cadence (Virtuoso), Spectre/APS/SpectreX, Calibre, EMX, mixed-signal AMS simulations, and MATLAB.
  • Experience with electrical transceiver applications (backplane and cable communications).

Education Requirements

Bachelor's degree plus 8 years of related experience, or Master’s degree plus 6 years, or PhD plus 3 years of related experience. The posting references "related experience" rather than specific degree fields; role implies degrees in electrical engineering, computer engineering, or a related technical discipline.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-06-08