Job Title
Analog/Mixed-Signal IC Design Engineer — Acacia
Role Summary
Member of a small mixed-signal IC design team developing high-speed, high-accuracy CMOS analog circuits for optical transceivers (100G–1.6T+). Work includes architecture, design, layout, verification, measurement and productization of ultra-deep-submicron CMOS ICs.
This is a hybrid role based in San Jose, CA (three days per week on-site) and requires collaboration with digital/DSP, system, package and module teams to meet system-level signal and power integrity targets.
Experience Level
Senior — position expects experienced engineers (see Education Requirements for explicit years-of-experience guidance).
Responsibilities
Key responsibilities include hands-on IC design, leadership of large blocks, cross-discipline collaboration, and bringing designs from concept to production.
- Architect, circuit-design, layout and silicon bring-up of high-speed analog and mixed-signal blocks.
- Lead design efforts for large blocks; mentor junior engineers and track deliverables.
- Perform simulation, modeling and system-level link analysis to meet signal-performance targets.
- Participate in peer reviews and establish robust design methodology from conception through production.
- Collaborate with digital/DSP, package and hardware teams to meet signal and power integrity requirements.
- Create and execute measurement and lab validation plans; characterize designs over PVT and in target environments.
- Ensure designs meet manufacturability and reliability constraints (EM, self-heating, IR drop concerns).
Requirements
Required technical skills and demonstrated experience; preferred items are listed as "Nice to have." Degrees and formal education levels are summarized separately below.
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Must-have: Several years of hands-on experience designing, simulating and measuring high-speed ICs; experience in at least 3 of the following domains: high-speed serial links (SERDES, ADC/DAC), modeling for link/system simulations, high-performance output drivers, high-performance PLLs, efficient clock distribution, opamps/programmable gain amplifiers, and equalization techniques.
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Must-have: Proven experience with circuit simulation and verification tools and mixed-signal flows.
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Nice to have: Experience with electrical transceiver applications (backplane and cable), FinFET or GAA technologies, and high-frequency layout including floorplanning and passive components.
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Nice to have: Design-for-manufacturability and characterization experience across PVT; electromigration, self-heating and IR-drop analysis.
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Nice to have: Laboratory validation experience, ESD methodology, and building test setups for silicon characterization.
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Tools: Experience with Cadence Virtuoso, Spectre/SpectreX/APS, Calibre, EMX, AMS simulation flows and MATLAB is preferred.
- Strong problem-solving, attention to detail, and ability to work independently and in small-team collaborative environments.
Education Requirements
Minimum: Bachelor's degree plus 8 years related experience, OR Master's degree plus 6 years, OR PhD plus 3 years, or equivalent practical experience. The posting does not specify a required field of study.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-27