Analog/mixed-signal IC Design Engineer - Acacia

Job Title

Analog/mixed-signal IC Design Engineer - Acacia

Role Summary

Join the Acacia mixed-signal IC design team to architect, design, layout, measure and productize ultra-deep sub-micron CMOS analog and mixed-signal circuits for high-speed optical transceivers (100G–1.6T+).

This is a hybrid role expected three days per week from the San Jose, CA office. You will collaborate with digital/DSP, system, package, and module teams to meet signal and power integrity and production requirements.

Experience Level

Senior-level. Typical qualification guidance: Bachelor's + 8 years, Master's + 6 years, or PhD + 3 years of related experience.

Responsibilities

Primary responsibilities include:

• Architect, design, simulate and verify high-speed analog/mixed-signal blocks (serial links, PLLs, drivers, opamps/PGAs, equalizers, data converters).
• Perform layout planning and floorplanning for high-frequency designs, and ensure signal/power integrity across package and board interfaces.
• Lead a large block on complex chips, track deliverables, participate in peer reviews, and apply robust design methodology from concept through production.
• Mentor junior engineers and coordinate cross-functional integration with DSP, system, package and module teams.
• Support lab validation, silicon bring-up, characterization over PVT, and resolve manufacturability and reliability issues.

Requirements

Must-have experience and skills:

• Proven design, simulation and measurement experience for high-speed ICs in at least three of the following areas: serializers/deserializers/data converters; system link modeling; high-performance output drivers; phase locked loops; efficient clock distribution/propagation; opamps/programmable gain amplifiers; equalization techniques.
• Experience taking analog/mixed-signal designs from concept to production, including characterization over process, voltage, temperature (PVT), and addressing IR drop and electromigration concerns.
• High-frequency layout experience and familiarity with floorplanning, power/ground partitioning and high-speed signal routing.

Nice-to-have:

• Experience with FinFET and GAA process nodes.
• Background in electrical transceiver applications (backplane and cable communications).
• Laboratory validation experience, including ESD best practices and construction of test setups.
• Familiarity with design tools and flows: Cadence Virtuoso, Spectre/APS/SpectreX, AMS mixed-signal simulation, Calibre, EMX, Matlab.

Education Requirements

Minimum qualifications specify a Bachelor's degree plus 8 years, a Master's plus 6 years, or a PhD plus 3 years of related experience; the posting allows equivalent practical experience in lieu of degree. Fields are implied to be engineering or related technical disciplines (not otherwise specified).

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).