Job Title
Analog/Mixed-Signal IC Design Engineer — Acacia
Role Summary
Join the Acacia mixed-signal IC design team to architect, design, layout, measure and productize high-speed, high-accuracy analog/mixed-signal CMOS circuits for optical transceivers (100G–1.6T+). This is a hybrid role requiring three days per week in the San Jose, CA office.
Experience Level
Senior — requires substantial industry experience; expect 8+ years of relevant experience in high-speed analog/mixed-signal IC design.
Responsibilities
Primary responsibilities include ownership of complex analog/mixed-signal blocks and collaboration across IC, DSP, package and module teams.
- Architect, design, layout and verify high-speed analog/mixed-signal blocks for ultra-deep sub-micron CMOS processes.
- Lead design efforts for large blocks on complex chips; track deliverables and schedules.
- Mentor and review work of other engineers; participate in peer design reviews and enforce robust design methodology.
- Collaborate with digital/DSP, package and hardware teams to meet signal and power integrity targets.
- Define and execute lab validation, measurement and characterization plans.
- Support productization: PVT characterization, reliability considerations, and production handoff.
Requirements
Must-have technical skills and domain experience.
- Proven experience with design, simulation and measurement of high-speed ICs in at least three of the following areas: high-speed serial links (SERDES, data converters), system link modeling, high-performance output drivers, phase-locked loops (PLLs), clock transmission/propagation, op amps/programmable gain amplifiers, and equalization techniques.
- Experience developing high-speed AMS circuits and delivering production-quality silicon.
- Demonstrated ability to lead a design block, mentor engineers, and coordinate cross-functional integration.
- Practical lab validation experience, including test setup construction and ESD-aware practices.
Preferred (nice-to-have):
- Experience with electrical transceiver applications for backplane and cable communications.
- Experience with FinFET and GAA process technologies.
- High-frequency layout experience: floorplanning, power/ground partitioning, analog/digital routing, and passive integration (inductors, transformers, transmission lines).
- Design-for-manufacturability skills: PVT characterization, electromigration analysis, self-heating and IR-drop analysis.
- Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS mixed-signal simulation flows and MATLAB for analysis.
Education Requirements
Minimum: Bachelor's degree plus 8 years related experience, or Master's plus 6 years, or PhD plus 3 years in a related technical field (or equivalent related experience). Specific fields not specified beyond "related" technical disciplines.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-03